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authorMike Frysinger <vapier@gentoo.org>2013-06-24 01:44:55 +0000
committerMike Frysinger <vapier@gentoo.org>2013-06-24 01:44:55 +0000
commit1bc26acb597f4f82d4d62db50f13c9cbb7eb8009 (patch)
treea440ca743463f5ec49a89e072e025684287c153e /sim/mcore
parent2eb45b34dd1fa9eef4dc9e85122cbee885eb6ab9 (diff)
downloadgdb-1bc26acb597f4f82d4d62db50f13c9cbb7eb8009.tar.gz
sim: bfin: speed up all insn testcases slightly
The main body of the "all insn" test is executed once per tested insn, and we test millions of insns here. Any shrinkage we can do in this loop will speed things up nicely (since it's multiplied per tested insn). To that end, simplify the end-of-table test into one less insn, and omit the SSYNC when we build for the sim. When we build to run on the hardware, this insn matters, but the sim doesn't have write store buffers in the chip that might get in the way (memory writes are atomic).
Diffstat (limited to 'sim/mcore')
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