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author | Jim Blandy <jimb@codesourcery.com> | 2003-05-13 00:08:58 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2003-05-13 00:08:58 +0000 |
commit | ad20141640f390ddb988537bf7d93316e5388e4b (patch) | |
tree | c1645477648a946f3973c701fb89b76e295e5bcc /sim/testsuite/sim/sh64/compact/add.cgs | |
parent | ea1c83e1893b74392032336333d19c00a414611d (diff) | |
download | gdb-jimb-ppc64-linux-20030509-branch.tar.gz |
Patch from Will Schmidt <willschm@us.ibm.com>:jimb-ppc64-linux-20030509-branchcvs/jimb-ppc64-linux-20030509-branch
These changes enable support of PPC64 architecture.
* config/powerpc/ppc64linux.mh: New file.
* config/powerpc/ppc64linux.mt: New file.
* config/powerpc/tm-ppc64linux.h: New file.
* ppc64-linux-tdep.c: New file.
* configure.host: Add clause for powerpc64-*-linux*
* configure.tgt: Add clause for powerpc64-*-linux*
* elfread.c (record_minimal_symbol_and_info): If
DROP_TEXT_NAME_PREFIX_CHAR is #defined, then drop a leading
instance of that char from the names of text symbols.
(elf_symtab_read): If SKIP_DATA_IN_OPD is #defined, ignore data
symbols in the .opd section.
* ppc-linux-nat.c (PTRACE_XFER_TYPE): Change the default for this
to 'long'.
(PPC_PTRACE_POKEUSR_3264, PPC_PTRACE_PEEKUSR_3264,
PPC_PTRACE_POKEDATA_3264, PPC_PTRACE_PEEKDATA_3264): Provide
default definitions for these.
(ARCH64): New macro.
(ppc_wordsize_pid): New function.
(kernel_u_size): Handle 64-bit case.
(ppc_register_u_addr): Same.
(fetch_register): Use the *_3264 requests when
debugging a 64-bit process from a 32-bit GDB.
(store_register): Same.
(GDB_MAX_ALLOCA, child_xfer_memory, udot_info): Copied from
infptrace.c.
(_initialize_ppc_linux_nat): New function, to register our copy of
the udot_info command.
* ppc-linux-tdep.c (TDEP): New macro.
(ppc64_linux_svr4_fetch_link_map_offsets): New function.
(read_memory_addr): Copied from rs6000-tdep.c.
(ppc64_linux_convert_from_func_ptr_addr): New function.
* rs6000-tdep.c (skip_prologue): Recognize more instructions for
saving the 'lr' and 'cr' registers; don't just pre-emptively mask
in the 'st' opcode as soon as we see an 'mflr' or 'mfcr' opcode.
Recognize more instructions for updating the stack pointer, and
loading the TOC pointer.
(registers_powerpc64, registers_a35): New register tables.
(rs6000_gdbarch_init): Register the 64-bit solib functions.
* solib-svr4.c (solib_break_names): If SOLIB_BREAK_NAME is
#defined, include an entry for it.
(enable_break): Call CONVERT_FROM_FUNC_PTR_ADDR when trying to
guess the linker's base address.
* config/powerpc/tm-linux.h
(ppc64_linux_svr4_fetch_link_map_offsets,
ppc64_linux_convert_from_func_ptr_addr): New declarations.
Diffstat (limited to 'sim/testsuite/sim/sh64/compact/add.cgs')
-rw-r--r-- | sim/testsuite/sim/sh64/compact/add.cgs | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/sim/testsuite/sim/sh64/compact/add.cgs b/sim/testsuite/sim/sh64/compact/add.cgs deleted file mode 100644 index 105e4849069..00000000000 --- a/sim/testsuite/sim/sh64/compact/add.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# sh testcase for add $rm, $rn -*- Asm -*- -# mach: all -# as: -isa=shcompact -# ld: -m shelf32 - - .include "compact/testutils.inc" - - start -init: - # Initialise some registers with values which help us to verify - # that the correct source registers are used by the ADD instruction. - mov #0, r0 - mov #1, r1 - mov #2, r2 - mov #3, r3 - mov #5, r5 - mov #15, r15 - -add: - # 0 + 0 = 0. - add r0, r0 - assert r0, #0 - - # 0 + 1 = 1. - add r0, r1 - assert r1, #1 - - # 1 + 2 = 3. - add r1, r2 - assert r2, #3 - - # 3 + 5 = 8. - add r3, r5 - assert r5, #8 - - # 8 + 8 = 16. - add r5, r5 - assert r5, #16 - - # 15 + 1 = 16. - add r15, r1 - assert r1, #16 - -neg: - mov #1, r0 - neg r0, r0 - mov #2, r1 - add r0, r1 - assert r1, #1 - -okay: - pass - -wrong: - fail |