diff options
author | Hans-Peter Nilsson <hp@axis.com> | 2006-01-10 07:11:21 +0000 |
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committer | Hans-Peter Nilsson <hp@axis.com> | 2006-01-10 07:11:21 +0000 |
commit | 64e65cc1a4225bde1729e85bdf3e0a9e936c5129 (patch) | |
tree | 418cc5d7689d0af5db16df64b880d07bd1888fc8 /sim | |
parent | 8303b12d399f09128e12a7291873378eadeb2f47 (diff) | |
download | gdb-64e65cc1a4225bde1729e85bdf3e0a9e936c5129.tar.gz |
* sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms,
sim/cris/asm/x7-v10.ms: Update expected cycle output.
Diffstat (limited to 'sim')
-rw-r--r-- | sim/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | sim/testsuite/sim/cris/asm/x1-v10.ms | 4 | ||||
-rw-r--r-- | sim/testsuite/sim/cris/asm/x3-v10.ms | 4 | ||||
-rw-r--r-- | sim/testsuite/sim/cris/asm/x7-v10.ms | 6 |
4 files changed, 15 insertions, 4 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index 20c2c520ffd..b775c983da2 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2006-01-10 Hans-Peter Nilsson <hp@axis.com> + + * sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms, + sim/cris/asm/x7-v10.ms: Update expected cycle output. + 2005-12-06 Hans-Peter Nilsson <hp@axis.com> * sim/cris/asm/movmp8.ms, sim/cris/asm/pcplus.ms: New tests. diff --git a/sim/testsuite/sim/cris/asm/x1-v10.ms b/sim/testsuite/sim/cris/asm/x1-v10.ms index e1a87c1053c..bfc48590bcf 100644 --- a/sim/testsuite/sim/cris/asm/x1-v10.ms +++ b/sim/testsuite/sim/cris/asm/x1-v10.ms @@ -2,7 +2,9 @@ #ld: --section-start=.text=0 #output: 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * ixnzvc 0\n #output: 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * ixnzvc 1\n -#output: a 0 0 0 0 0 ff004567 0 0 0 0 0 0 0 0 * ixNzvc 3\n +#output: a 0 0 0 0 0 ff004567 0 0 0 0 0 0 0 0 * ixNzvc 2\n #sim: --cris-trace=basic +; With a "--cris-trace=all", cycles for the last line would be 3. + .include "movect10.ms" diff --git a/sim/testsuite/sim/cris/asm/x3-v10.ms b/sim/testsuite/sim/cris/asm/x3-v10.ms index 113e18db491..fc54f3c358b 100644 --- a/sim/testsuite/sim/cris/asm/x3-v10.ms +++ b/sim/testsuite/sim/cris/asm/x3-v10.ms @@ -2,9 +2,11 @@ #ld: --section-start=.text=0 #output: 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * ixnzvc 0\n #output: 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * ixnzvc 1\n -#output: a 0 0 0 0 0 12 0 0 0 0 0 0 0 0 * ixnzvc 3\n +#output: a 0 0 0 0 0 12 0 0 0 0 0 0 0 0 * ixnzvc 2\n #output: 12 0 0 0 0 0 12 0 0 0 0 0 0 0 0 * ixnzvc 1\n #output: 1e 0 0 0 0 0 12 0 0 0 0 0 0 0 0 * ixnzvc 2\n #sim: --cris-trace=basic +; With a "--cris-trace=all", cycles for the third line would be 3. + .include "tjsrcv10.ms" diff --git a/sim/testsuite/sim/cris/asm/x7-v10.ms b/sim/testsuite/sim/cris/asm/x7-v10.ms index f465143f504..8b548ff1ea5 100644 --- a/sim/testsuite/sim/cris/asm/x7-v10.ms +++ b/sim/testsuite/sim/cris/asm/x7-v10.ms @@ -2,14 +2,16 @@ #ld: --section-start=.text=0 #output: 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * ixnzvc 0\n #output: 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * ixnzvc 1\n -#output: c 0 0 0 24 0 0 0 0 0 0 0 0 0 0 * ixnzvc 5\n +#output: c 0 0 0 24 0 0 0 0 0 0 0 0 0 0 * ixnzvc 4\n #output: e 0 0 0 24 0 0 0 0 0 0 0 0 0 0 * ixnzvc 1\n #output: 10 0 0 0 24 0 0 0 0 0 0 0 0 0 0 * ixnZvc 1\n #output: 14 0 0 0 24 0 24 0 0 0 0 0 0 0 0 * ixnzvc 3\n #output: 18 0 0 0 24 0 24 0 0 0 0 0 0 0 0 * ixnzvc 3\n -#output: 20 0 0 0 24 0 24 0 0 0 0 0 0 0 0 * ixnzvc 5\n +#output: 20 0 0 0 24 0 24 0 0 0 0 0 0 0 0 * ixnzvc 4\n #sim: --cris-trace=basic +; With a "--cris-trace=all", cycles for the third and last line would be 5. + ; Check that prefix+insn are traced as one. .include "testutils.inc" |