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-rw-r--r--gdb/config/arc/tm-embed.h164
1 files changed, 70 insertions, 94 deletions
diff --git a/gdb/config/arc/tm-embed.h b/gdb/config/arc/tm-embed.h
index 9ac1c1adac1..5cd7271fc23 100644
--- a/gdb/config/arc/tm-embed.h
+++ b/gdb/config/arc/tm-embed.h
@@ -1,101 +1,77 @@
+/* Target dependent code for ARC processor family, for GDB, the GNU debugger.
-#define CONFIG_OSABI GDB_OSABI_UNKNOWN
+ Copyright 2005, 2008, 2009 Free Software Foundation, Inc.
-struct gdbarch *arc_jtag_init (struct gdbarch *gdbarch);
-#define CONFIG_INIT_TDEP arc_jtag_init
+ Contributed by ARC International (www.arc.com)
-/* The core regnums here are the same as the hardware register numbers. We
- cannot do that for aux registers, because the aux regs on the h/w do not
- have contiguous numbers. */
+ Authors:
+ Codito Technologies Pvt. Ltd.
+ Richard Stuckey <richard.stuckey@arc.com>
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+/******************************************************************************/
+/* */
+/* Outline: */
+/* This header file defines register numbers for the arc-elf32 */
+/* configuration of the ARC gdb. */
+/* */
+/******************************************************************************/
+
+#ifndef ARC_TM_EMBED_H
+#define ARC_TM_EMBED_H
+
+#include "gdbarch.h"
+#include "arc-elf32-tdep.h"
+#include "arc-registers.h"
+
+
+#define CONFIG_OSABI GDB_OSABI_UNKNOWN
+
+#define CONFIG_INIT_TDEP (void) arc_elf32_initialize (gdbarch, arches);
+
+
+/* These are hardware register numbers (i.e. NOT gdb register numbers). */
enum arc700_jtag_regnums
- {
- ARC_FP_REGNUM = 27,
- ARC_SP_REGNUM ,
- ARC_ILINK1_REGNUM ,
- ARC_ILINK2_REGNUM ,
- ARC_BLINK_REGNUM ,
- /* Extension core regs are 32..59 inclusive. */
+{
+ /* Regnums 0 .. 26 are R0 .. R26 */
+
+ ARC_FP_REGNUM = 27,
+ ARC_SP_REGNUM,
+ ARC_ILINK1_REGNUM,
+ ARC_ILINK2_REGNUM,
+ ARC_BLINK_REGNUM,
+
+ /* Extension core regs are R32 .. R59 inclusive. */
+
ARC_LP_COUNT_REGNUM = 60,
+
/* 61 is reserved, 62 is not a real register. */
- ARC_PCL_REGNUM = 63,
-
- /* Now the aux registers. */
-
- ARC_STATUS_REGNUM = 64,
- ARC_SEMAPHORE_REGNUM ,
- ARC_LP_START_REGNUM ,
- ARC_LP_END_REGNUM ,
- ARC_IDENTITY_REGNUM ,
- ARC_DEBUG_REGNUM ,
- ARC_PC_REGNUM ,
- ARC_STATUS32_REGNUM ,
- ARC_STATUS32_L1_REGNUM ,
- ARC_STATUS32_L2_REGNUM ,
-
- ARC_COUNT0_REGNUM ,
- ARC_CONTROL0_REGNUM ,
- ARC_LIMIT0_REGNUM ,
- ARC_INT_VECTOR_BASE_REGNUM ,
- ARC_AUX_MACMODE_REGNUM ,
- ARC_AUX_IRQ_LV12_REGNUM ,
-
- ARC_COUNT1_REGNUM ,
- ARC_CONTROL1_REGNUM ,
- ARC_LIMIT1_REGNUM ,
- ARC_AUX_IRQ_LEV_REGNUM ,
- ARC_AUX_IRQ_HINT_REGNUM ,
- ARC_ERET_REGNUM ,
- ARC_ERBTA_REGNUM ,
- ARC_ERSTATUS_REGNUM ,
- ARC_ECR_REGNUM ,
- ARC_EFA_REGNUM ,
- ARC_ICAUSE1_REGNUM ,
- ARC_ICAUSE2_REGNUM ,
- ARC_AUX_IENABLE_REGNUM ,
- ARC_AUX_ITRIGGER_REGNUM ,
- ARC_XPU_REGNUM ,
- ARC_BTA_REGNUM ,
- ARC_BTA_L1_REGNUM ,
- ARC_BTA_L2_REGNUM ,
- ARC_AUX_IRQ_PULSE_CANCEL_REGNUM ,
- ARC_AUX_IRQ_PENDING_REGNUM ,
-
- /* Build configuration registers. */
- ARC_BCR_0_REGNUM ,
- ARC_BCR_1_REGNUM ,
- ARC_BCR_2_REGNUM ,
- ARC_BCR_3_REGNUM ,
- ARC_BCR_4_REGNUM ,
- ARC_BCR_5_REGNUM ,
- ARC_BCR_6_REGNUM ,
- ARC_BCR_7_REGNUM ,
- ARC_BCR_8_REGNUM ,
- ARC_BCR_9_REGNUM ,
- ARC_BCR_A_REGNUM ,
- ARC_BCR_B_REGNUM ,
- ARC_BCR_C_REGNUM ,
- ARC_BCR_D_REGNUM ,
- ARC_BCR_E_REGNUM ,
- ARC_BCR_F_REGNUM ,
- ARC_BCR_10_REGNUM ,
- ARC_BCR_11_REGNUM ,
- ARC_BCR_12_REGNUM ,
-
- ARC_BCR_13_REGNUM ,
- ARC_BCR_14_REGNUM ,
- ARC_BCR_15_REGNUM ,
- ARC_BCR_16_REGNUM ,
- ARC_BCR_17_REGNUM ,
- ARC_BCR_18_REGNUM ,
- ARC_BCR_19_REGNUM ,
- ARC_BCR_1A_REGNUM ,
- ARC_BCR_1B_REGNUM ,
- ARC_BCR_1C_REGNUM ,
- ARC_BCR_1D_REGNUM ,
- ARC_BCR_1E_REGNUM ,
- ARC_BCR_1F_REGNUM ,
-
-
- ARC_NR_REGS
- };
+ ARC_PCL_REGNUM = 63,
+
+ /* end marker: this is not a register, but its integer value gives the number
+ * of registers
+ */
+ ARC_REG_END_MARKER
+};
+
+
+#define ARC_NR_PSEUDO_REGS 0
+#define ARC_NR_REGS (int) (arc_core_register_count(gdbarch) + \
+ arc_aux_register_count (gdbarch))
+#endif /* ARC_TM_EMBED_H */
+/******************************************************************************/