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Diffstat (limited to 'opcodes/mips-opc.c')
-rw-r--r--opcodes/mips-opc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 80b555baec5..ba817f51832 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -942,11 +942,11 @@ const struct mips_opcode mips_builtin_opcodes[] =
assembler, but will never match user input (because the line above
will match first). */
{"j", "a", 0x08000000, 0xfc000000, UBD, 0, I1, 0, 0 },
-{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, 0, I1, 0, 0 },
+{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_31, 0, I1, 0, 0 },
{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, 0, I1, 0, 0 },
/* jalr.hb is officially MIPS{32,64}R2, but it works on R1 as jalr
with the same hazard barrier effect. */
-{"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, UBD|RD_s|WR_d, 0, I32, 0, 0 },
+{"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, UBD|RD_s|WR_31, 0, I32, 0, 0 },
{"jalr.hb", "d,s", 0x00000409, 0xfc1f07ff, UBD|RD_s|WR_d, 0, I32, 0, 0 },
/* SVR4 PIC code requires special handling for jal, so it must be a
macro. */