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-rw-r--r--sim/fr30/ChangeLog10
-rw-r--r--sim/fr30/sem-switch.c28
-rw-r--r--sim/fr30/sem.c32
-rw-r--r--sim/fr30/traps.c5
4 files changed, 46 insertions, 29 deletions
diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog
index 105d4f329a2..f0019cd226b 100644
--- a/sim/fr30/ChangeLog
+++ b/sim/fr30/ChangeLog
@@ -1,3 +1,13 @@
+1999-10-04 Doug Evans <devans@casey.cygnus.com>
+
+ * sem.c,sem-switch.c: Rebuild.
+ * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of
+ result to SEM_PC. Return vpc.
+
+Wed Sep 29 14:45:32 1999 Dave Brolley <brolley@cygnus.com>
+
+ * traps.c (sim_engine_invalid_insn): Return PC.
+
Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
diff --git a/sim/fr30/sem-switch.c b/sim/fr30/sem-switch.c
index f73f11a7058..f3477e5b8b1 100644
--- a/sim/fr30/sem-switch.c
+++ b/sim/fr30/sem-switch.c
@@ -270,13 +270,15 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
-#if WITH_SCACHE
- /* Update the recorded pc in the cpu state struct. */
+ /* Update the recorded pc in the cpu state struct.
+ Only necessary for WITH_SCACHE case, but to avoid the
+ conditional compilation .... */
SET_H_PC (pc);
-#endif
- sim_engine_invalid_insn (current_cpu, pc);
- sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
- /* NOTREACHED */
+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
+ using the default-insn-bitsize spec. When executing insns in parallel
+ we may want to queue the fault and continue execution. */
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
}
#undef FLD
@@ -3390,7 +3392,7 @@ if (EQBI (GET_H_SBIT (), 0)) {
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
}
#undef FLD
@@ -3406,7 +3408,7 @@ do { } while (0); /*nop*/
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
#undef FLD
}
@@ -4509,7 +4511,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
#undef FLD
}
@@ -4524,7 +4526,7 @@ do { } while (0); /*nop*/
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
#undef FLD
}
@@ -4539,7 +4541,7 @@ do { } while (0); /*nop*/
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
#undef FLD
}
@@ -4554,7 +4556,7 @@ do { } while (0); /*nop*/
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
#undef FLD
}
@@ -4569,7 +4571,7 @@ do { } while (0); /*nop*/
IADDR UNUSED pc = abuf->addr;
vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
#undef FLD
}
diff --git a/sim/fr30/sem.c b/sim/fr30/sem.c
index 58896987b92..0d83f36aa5d 100644
--- a/sim/fr30/sem.c
+++ b/sim/fr30/sem.c
@@ -55,13 +55,15 @@ SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
{
-#if WITH_SCACHE
- /* Update the recorded pc in the cpu state struct. */
+ /* Update the recorded pc in the cpu state struct.
+ Only necessary for WITH_SCACHE case, but to avoid the
+ conditional compilation .... */
SET_H_PC (pc);
-#endif
- sim_engine_invalid_insn (current_cpu, pc);
- sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
- /* NOTREACHED */
+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
+ using the default-insn-bitsize spec. When executing insns in parallel
+ we may want to queue the fault and continue execution. */
+ vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
}
return vpc;
@@ -3385,7 +3387,7 @@ SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
{
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
}
return vpc;
@@ -3403,7 +3405,7 @@ SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
IADDR UNUSED pc = abuf->addr;
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
return vpc;
#undef FLD
@@ -4596,7 +4598,7 @@ SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
IADDR UNUSED pc = abuf->addr;
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
return vpc;
#undef FLD
@@ -4613,7 +4615,7 @@ SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
IADDR UNUSED pc = abuf->addr;
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
return vpc;
#undef FLD
@@ -4630,7 +4632,7 @@ SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
IADDR UNUSED pc = abuf->addr;
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
return vpc;
#undef FLD
@@ -4647,7 +4649,7 @@ SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
IADDR UNUSED pc = abuf->addr;
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
return vpc;
#undef FLD
@@ -4664,7 +4666,7 @@ SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
IADDR UNUSED pc = abuf->addr;
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-do { } while (0); /*nop*/
+((void) 0); /*nop*/
return vpc;
#undef FLD
@@ -5701,7 +5703,9 @@ SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu)
for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
{
- int valid_p = CGEN_INSN_MACH_HAS_P (idesc_table[sf->index].idata, mach_num);
+ const CGEN_INSN *insn = idesc_table[sf->index].idata;
+ int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
+ || CGEN_INSN_MACH_HAS_P (insn, mach_num));
#if FAST_P
if (valid_p)
idesc_table[sf->index].sem_fast = sf->fn;
diff --git a/sim/fr30/traps.c b/sim/fr30/traps.c
index 11f7a30605d..25cd7b99459 100644
--- a/sim/fr30/traps.c
+++ b/sim/fr30/traps.c
@@ -24,8 +24,8 @@ with this program; if not, write to the Free Software Foundation, Inc.,
/* The semantic code invokes this for invalid (unrecognized) instructions. */
-void
-sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia)
+SEM_PC
+sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
{
SIM_DESC sd = CPU_STATE (current_cpu);
@@ -47,6 +47,7 @@ sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia)
else
#endif
sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
+ return vpc;
}
/* Process an address exception. */
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