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* 2002-03-19 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-202-20/+6
| | | | | | * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f) (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove unused definitions.
* 2002-03-19 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-202-547/+627
| | | | * cp1.c: Fix many formatting issues.
* 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-202-35/+88
| | | | | | | * cp1.c (fpu_format_name): New function to replace... (DOFMT): This. Delete, and update all callers. (fpu_rounding_mode_name): New function to replace... (RMMODE): This. Delete, and update all callers.
* 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-204-1069/+1104
| | | | | | | * interp.c: Move FPU support routines from here to... * cp1.c: Here. New file. * Makefile.in (SIM_OBJS): Add cp1.o to object list. (cp1.o): New target.
* Increase default memory size to 8MB.Anthony Green2002-03-182-1/+5
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* 2002-03-12 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-124-19/+606
| | | | | | | | | | | | | | * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets. * mips.igen (mips32, mips64): New models, add to all instructions and functions as appropriate. (loadstore_ea, check_u64): New variant for model mips64. (check_fmt_p): New variant for models mipsV and mips64, remove mipsV model marking fro other variant. (SLL) Rename to... (SLLa) this. (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions for mips32 and mips64. (DCLO, DCLZ): New instructions for mips64.
* 2002-03-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-082-6/+12
| | | | | | * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print immediate or code as a hex value with the "%#lx" format. (ANDI): Likewise, and fix printed instruction name.
* 2002-03-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-082-0/+15
| | | | * igen.c (print_itrace_format): Add support for a new "%#lx" format.
* * m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case.Stephane Carrez2002-03-075-34/+76
| | | | | | | | | | | | | | | | (cpu_move16): Likewise. (sim_memory_error): Use sim_io_printf. (cpu_option_handler): Fix compilation warning. * interp.c (sim_hw_configure): Fix compilation warning; remove m68hc12sio@2 device. (sim_open): Likewise. * dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2 flags when reset. (cycle_to_string): Improve convertion of cpu cycle number. (m68hc11tim_info): Print info about PACNT. (m68hc11tim_io_write_buffer): Fix clearing of TFLG2; handle TCTL1 and TCTL2 registers. * dv-m68hc11.c (m68hc11_info): Print 6811 current running mode.
* * interp.c (sim_hw_configure): Save the HW cpu pointer in theStephane Carrez2002-03-076-16/+579
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu struct. (sim_hw_configure): Connect the capture input/output events. * sim-main.h (_sim_cpu): New member hw_cpu. (m68hc11cpu_set_oscillator): Declare. (m68hc11cpu_clear_oscillator): Declare. (m68hc11cpu_set_port): Declare. * dv-m68hc11.c (m68hc11_options): New for oscillator commands. (m68hc11cpu_ports): New input ports and output ports to reflect the HC11 IOs. (m68hc11_delete): Cleanup any running oscillator. (attach_m68hc11_regs): Create the input oscillators. (make_oscillator): New function. (find_oscillator): New function. (oscillator_handler): New function. (reset_oscillators): New function. (m68hc11cpu_port_event): Handle the new input ports. (m68hc11cpu_set_oscillator): New function. (m68hc11cpu_clear_oscillator): New function. (get_frequency): New function. (m68hc11_option_handler): New function. (m68hc11cpu_set_port): New function. (m68hc11cpu_io_write): Post the port output events. * dv-m68hc11spi.c (set_bit_port): Use m68hc11cpu_set_port to set the output port value. * dv-m68hc11tim.c (m68hc11tim_port_event): Handle CAPTURE event by latching the TCNT value in the register.
* * sim-main.h (cpu_frame, cpu_frame_list): Remove.Stephane Carrez2002-03-074-248/+22
| | | | | | | | | | | | | | | | | | (cpu_frame_reg, cpu_print_frame): Remove. (cpu_m68hc11_push_uint8, cpu_m68hc11_pop_uint8): Cleanup. (cpu_m68hc11_push_uint16, cpu_m68hc11_pop_uint16): Likewise. (cpu_m68hc12_push_uint8, cpu_m68hc12_push_uint16): Likewise. (cpu_m68hc12_pop_uint8, cpu_m68hc12_pop_uint16): Likewise. * m68hc11_sim.c (cpu_find_frame): Remove. (cpu_create_frame_list): Remove. (cpu_remove_frame_list, cpu_create_frame, cpu_free_frame): Remove. (cpu_frame_reg, cpu_print_frame, cpu_update_frame): Remove. (cpu_call): Cleanup to remove #if HAVE_FRAME and calls to the above. (cpu_update_frame): Likewise. (cpu_return): Likewise. (cpu_reset): Likewise. (cpu_initialize): Likewise. * interp.c (sim_do_command): Remove call to cpu_print_frame.
* * interrupts.c (interrupts_reset): New function, setup interruptStephane Carrez2002-03-074-24/+354
| | | | | | | | | | | | | | | | | | | | vector address according to cpu mode. (interrupts_initialize): Move reset portion to the above. (interrupt_names): New table to give a name to interrupts. (idefs): Handle pulse accumulator interrupts. (interrupts_info): Print the interrupt history. (interrupt_option_handler): New function. (interrupt_options): New table of options. (interrupts_update_pending): Keep track of when interrupts are raised and implement breakpoint-on-raise-interrupt. (interrupts_process): Keep track of when interrupts are taken and implement breakpoint-on-interrupt. * interrupts.h (struct interrupt_history): Define. (struct interrupt): Keep track of the interrupt history. (interrupts_reset): Declare. (interrupts_initialize): Update prototype. * m68hc11_sim.c (cpu_reset): Reset interrupts. (cpu_initialize): Cleanup.
* * MAINTAINERS: Record self as maintainer of m68hc11 simulator.Stephane Carrez2002-03-062-0/+5
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* 2002-03-05 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-062-0/+8
| | | | | * sim-main.h (UndefinedResult, Unpredictable): New macros which currently do nothing.
* 2002-03-05 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-062-2/+34
| | | | | | | | | | | | | * sim-main.h (status_UX, status_SX, status_KX, status_TS) (status_PX, status_MX, status_CU0, status_CU1, status_CU2) (status_CU3): New definitions. * sim-main.h (ExceptionCause): Add new values for MIPS32 and MIPS64: MDMX, MCheck, CacheErr. Update comments for DebugBreakPoint and NMIReset to note their status in MIPS32 and MIPS64. (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck) (SignalExceptionCacheErr): New exception macros.
* 2002-03-05 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-063-3/+12
| | | | | | | | * mips.igen (check_fpu): Enable check for coprocessor 1 usability. * sim-main.h (COP_Usable): Define, but for now coprocessor 1 is always enabled. (SignalExceptionCoProcessorUnusable): Take as argument the unusable coprocessor number.
* fix month on 4 of my recent entries (*sigh*)Chris Demetriou2002-03-051-4/+4
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* 2002-03-05 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-052-19/+23
| | | | * mips.igen: Fix formatting of all SignalException calls.
* 2002-02-05 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-052-9/+4
| | | | * sim-main.h (SIGNEXTEND): Remove.
* 2002-02-04 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-052-5/+6
| | | | | * mips.igen: Remove gencode comment from top of file, fix spelling in another comment.
* 2002-02-04 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-052-132/+115
| | | | | | | | | | | * mips.igen (check_fmt, check_fmt_p): New functions to check whether specific floating point formats are usable. (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt) (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt) (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W): Use the new functions. (do_c_cond_fmt): Remove format checks... (C.cond.fmta, C.cond.fmtb): And move them into all callers.
* 2002-02-03 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-042-52/+56
| | | | * mips.igen: Fix formatting of check_fpu calls.
* 2002-03-03 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-042-1/+5
| | | | * mips.igen (FLOOR.L.fmt): Store correct destination register.
* 2002-03-03 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-042-12/+16
| | | | * mips.igen: Remove whitespace at end of lines.
* 2002-03-02 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-032-16/+45
| | | | | | | | * mips.igen (loadstore_ea): New function to do effective address calculations. (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store, do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1, CACHE): Use loadstore_ea to do effective address computations.
* 2002-03-02 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-033-8/+13
| | | | | * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND. * mips.igen (LL, CxC1, MxC1): Likewise.
* 2002-03-02 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-032-276/+145
| | | | | | | | | | | * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE): Don't split opcode fields by hand, use the opcode field values provided by igen.
* 2002-03-01 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-012-14/+20
| | | | | | | * mips.igen (do_divu): Fix spacing. * mips.igen (do_dsllv): Move to be right before DSLLV, to match the rest of the do_<shift> functions.
* 2002-03-01 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-012-0/+21
| | | | | * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl, DSRL32, do_dsrlv): Trace inputs and results.
* * vaporous abdicationFrank Ch. Eigler2002-03-012-1/+6
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* 2002-03-01 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-013-1/+8
| | | | | | * mips.igen (CACHE): Provide instruction-printing string. * interp.c (signal_exception): Comment tokens after #endif.
* 2002-02-28 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-012-44/+55
| | | | | | | | | | | * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32". (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt, NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt, ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt, CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta, C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1, SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D, LWC1, SWC1): Add "f" to filter, since these are FP instructions.
* 2002-02-28 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-012-3/+9
| | | | | | * mips.igen (DSRA32, DSRAV): Fix order of arguments in instruction-printing string. (LWU): Use '64' as the filter flag.
* 2002-02-28 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-012-1/+5
| | | | * mips.igen (SDXC1): Fix instruction-printing string.
* 2002-02-28 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-03-012-4/+7
| | | | | * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with filter flags "32,f".
* 2002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-282-1/+6
| | | | | * mips.igen (PREFX): This is a 64-bit instruction, use '64' as the filter flag.
* 2002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-282-2/+11
| | | | | | | | * mips.igen (PREFX): Tweak instruction opcode fields (i.e., add a comma) so that it more closely match the MIPS ISA documentation opcode partitioning. (PREF): Put useful names on opcode fields, and include instruction-printing string.
* 2002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-282-0/+150
| | | | | | | | | | | | | | | | | | | | | | * mips.igen (check_u64): New function which in the future will check whether 64-bit instructions are usable and signal an exception if not. Currently a no-op. (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL, DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1, LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64. * mips.igen (check_fpu): New function which in the future will check whether FPU instructions are usable and signal an exception if not. Currently a no-op. (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1, LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf, MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
* 2002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-272-156/+160
| | | | | | | * mips.igen (do_load_left, do_load_right): Move to be immediately following do_load. (do_store_left, do_store_right): Move to be immediately following do_store.
* 2002-02-27 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-272-1/+193
| | | | | * mips.igen (mipsV): New model name. Also, add it to all instructions and functions where it is appropriate.
* Fix PR gdb/287. From wiz at danbala. Then->than and typos.Andrew Cagney2002-02-254-3/+15
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* * armos.c (SWIWrite0): Use generic host_callback mechanismKeith Seitz2002-02-212-31/+50
| | | | | | | | | for supported OS functions "open", "close", "write", etc. (SWIopen): Likewise. (SWIread): Likewise. (SWIwrite): Likewise. (SWIflen): Likewise. (ARMul_OSHandleSWI): Likewise.
* 2002-02-18 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-192-96/+382
| | | | | * mips.igen: For all functions and instructions, list model names that support that instruction one per line.
* 2002-02-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-112-9/+32
| | | | | | | * mips.igen: Add some additional comments about supported models, and about which instructions go where. (BC1b, MFC0, MTC0, RFE): Sort supported models in the same order as is used in the rest of the file.
* 2002-02-11 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-112-7/+14
| | | | | | | | * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment indicating that ALU32_END or ALU64_END are there to check for overflow. (DADD): Likewise, but also remove previous comment about overflow checking.
* 2002-02-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-112-49/+59
| | | | | | | | | | * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU, JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU, SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI, ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode fields (i.e., add and move commas) so that they more closely match the MIPS ISA documentation opcode partitioning.
* 2002-02-10 Chris Demetriou cgd@sibyte.comChris Demetriou2002-02-112-6/+18
| | | | | | | | * mips.igen (ADDI): Print immediate value. (BREAK): Print code. (DADDIU, DSRAV, DSRLV): Print correct instruction name. (SLL): Print "nop" specially, and don't run the code that does the shift for the "nop" case.
* 2002-02-10 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2002-02-1012-36/+50
| | | | | | | | | | | | | | * callback.c: Fix some spelling errors. * hw-device.h: Likewise. * hw-tree.c: Likewise. * sim-abort.c: Likewise. * sim-alu.h: Likewise. * sim-core.h: Likewise. * sim-events.c: Likewise. * sim-events.h: Likewise. * sim-fpu.h: Likewise. * sim-profile.h: Likewise. * sim-utils.c: Likewise.
* Document check-in proceduresNick Clifton2002-02-072-3/+15
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* Modify previous patch so that it is only triggered for COFF format executables.Nick Clifton2002-02-052-11/+20
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