Remove sysdeps/alpha/soft-fp directory.

As per <https://sourceware.org/ml/libc-alpha/2014-10/msg00369.html>,
there should not be separate sysdeps/<arch>/soft-fp directories when
those are used by all configurations that use sysdeps/<arch>, and,
more generally, should not be sysdeps/foo/Implies files pointing to a
subdirectory foo/bar.  This patch eliminates the
sysdeps/alpha/soft-fp directory accordingly, merging its contents
into sysdeps/alpha.

Tested with build-many-glibcs.py that installed stripped shared
libraries for alpha-linux-gnu are unchanged by this patch.

	* sysdeps/alpha/Implies: Remove alpha/soft-fp.
	* sysdeps/alpha/Makefile [$(subdir) = soft-fp] (sysdep_routines):
	Add functions moved from ....
	[$(subdir) = math] (CPPFLAGS): Add -I../soft-fp.  Moved from ....
	* sysdeps/alpha/soft-fp/Makefile: ... here.  Remove file.
	* sysdeps/alpha/Versions (libc): Add GLIBC_2.3.4 symbols moved
	from ....
	* sysdeps/alpha/soft-fp/Versions: ... here.  Remove file.
	* sysdeps/alpha/soft-fp/e_sqrtl.c: Move to ....
	* sysdeps/alpha/e_sqrtl.c: ... here.
	* sysdeps/alpha/soft-fp/local-soft-fp.h: Move to ....
	* sysdeps/alpha/local-soft-fp.h: ... here.
	* sysdeps/alpha/soft-fp/ots_add.c: Move to ....
	* sysdeps/alpha/ots_add.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cmp.c: Move to ....
	* sysdeps/alpha/ots_cmp.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cmpe.c: Move to ....
	* sysdeps/alpha/ots_cmpe.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cvtqux.c: Move to ....
	* sysdeps/alpha/ots_cvtqux.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cvtqx.c: Move to ....
	* sysdeps/alpha/ots_cvtqx.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cvttx.c: Move to ....
	* sysdeps/alpha/ots_cvttx.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cvtxq.c: Move to ....
	* sysdeps/alpha/ots_cvtxq.c: ... here.
	* sysdeps/alpha/soft-fp/ots_cvtxt.c: Move to ....
	* sysdeps/alpha/ots_cvtxt.c: ... here.
	* sysdeps/alpha/soft-fp/ots_div.c: Move to ....
	* sysdeps/alpha/ots_div.c: ... here.
	* sysdeps/alpha/soft-fp/ots_mul.c: Move to ....
	* sysdeps/alpha/ots_mul.c: ... here.
	* sysdeps/alpha/soft-fp/ots_nintxq.c: Move to ....
	* sysdeps/alpha/ots_nintxq.c: ... here.
	* sysdeps/alpha/soft-fp/ots_sub.c: Move to ....
	* sysdeps/alpha/ots_sub.c: ... here.
	* sysdeps/alpha/soft-fp/sfp-machine.h: Move to ....
	* sysdeps/alpha/sfp-machine.h: ... here.

1 files changed, 55 insertions, 0 deletions

diff --git a/sysdeps/alpha/local-soft-fp.h b/sysdeps/alpha/local-soft-fp.h
new file mode 100644
index 0000000000..d562e0829e
--- /dev/null
+++ b/sysdeps/alpha/local-soft-fp.h
@@ -0,0 +1,55 @@
+#include <stdlib.h>
+#include <soft-fp.h>
+#include <quad.h>
+
+/* Helpers for the Ots functions which receive long double arguments
+   in two integer registers, and return values in $16+$17.  */
+
+#define AXP_UNPACK_RAW_Q(X, val)			\
+  do {							\
+    union _FP_UNION_Q _flo;				\
+    _flo.longs.a = val##l;				\
+    _flo.longs.b = val##h;				\
+    FP_UNPACK_RAW_QP(X, &_flo);				\
+  } while (0)
+
+#define AXP_UNPACK_SEMIRAW_Q(X, val)			\
+  do {							\
+    union _FP_UNION_Q _flo;				\
+    _flo.longs.a = val##l;				\
+    _flo.longs.b = val##h;				\
+    FP_UNPACK_SEMIRAW_QP(X, &_flo);			\
+  } while (0)
+
+#define AXP_UNPACK_Q(X, val)				\
+  do {							\
+    AXP_UNPACK_RAW_Q(X, val);				\
+    _FP_UNPACK_CANONICAL(Q, 2, X);			\
+  } while (0)
+
+#define AXP_PACK_RAW_Q(val, X) FP_PACK_RAW_QP(&val##_flo, X)
+
+#define AXP_PACK_SEMIRAW_Q(val, X)			\
+  do {							\
+    _FP_PACK_SEMIRAW(Q, 2, X);				\
+    AXP_PACK_RAW_Q(val, X);				\
+  } while (0)
+
+#define AXP_PACK_Q(val, X)				\
+  do {							\
+    _FP_PACK_CANONICAL(Q, 2, X);			\
+    AXP_PACK_RAW_Q(val, X);				\
+  } while (0)
+
+#define AXP_DECL_RETURN_Q(X) union _FP_UNION_Q X##_flo
+
+/* ??? We don't have a real way to tell the compiler that we're wanting
+   to return values in $16+$17.  Instead use a volatile asm to make sure
+   that the values are live, and just hope that nothing kills the values
+   in between here and the end of the function.  */
+#define AXP_RETURN_Q(X)					\
+  do {							\
+    register long r16 __asm__("16") = X##_flo.longs.a;	\
+    register long r17 __asm__("17") = X##_flo.longs.b;	\
+    asm volatile ("" : : "r"(r16), "r"(r17));		\
+  } while (0)