diff options
author | tege <tege@gmplib.org> | 2007-04-25 18:19:24 +0200 |
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committer | tege <tege@gmplib.org> | 2007-04-25 18:19:24 +0200 |
commit | e0f6cebc6afa4442cd5f0bc22edba04812991345 (patch) | |
tree | ca0674ca4154bf92d65fdcb6fc55c820e045399c | |
parent | ca799fba1f9b8e9e7a5d368e0b9d29630e6465c6 (diff) | |
download | gmp-e0f6cebc6afa4442cd5f0bc22edba04812991345.tar.gz |
Fix comment typos.
-rw-r--r-- | macos/README | 4 | ||||
-rw-r--r-- | mpn/x86/divrem_1.asm | 2 | ||||
-rw-r--r-- | mpn/x86/k6/divrem_1.asm | 2 | ||||
-rw-r--r-- | mpn/x86/mod_1.asm | 2 | ||||
-rw-r--r-- | scanf/sscanffuns.c | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/macos/README b/macos/README index 9e23b71f9..8b0ba1af0 100644 --- a/macos/README +++ b/macos/README @@ -204,7 +204,7 @@ To cleanup to the state before configure you execute the output from % make clean -To remove the the resulting library as well you do +To remove the resulting library as well you do % make distclean @@ -240,4 +240,4 @@ remove files from the Unix side while MPW is running. MPW cache information about what the file system looks like and gets very confused or crash. -Kent Boortz <kent@swox.se> +Kent Boortz diff --git a/mpn/x86/divrem_1.asm b/mpn/x86/divrem_1.asm index b59186acd..9125b95af 100644 --- a/mpn/x86/divrem_1.asm +++ b/mpn/x86/divrem_1.asm @@ -52,7 +52,7 @@ C mpn/generic/divrem_1.c, but has the advantage that we get the desired divl C instruction even when gcc is not being used (when longlong.h only has the C rather slow generic C udiv_qrnnd(). C -C A test is done to see if the high limb is less the the divisor, and if so +C A test is done to see if the high limb is less than the divisor, and if so C one less div is done. A div is between 20 and 40 cycles on the various C x86s, so assuming high<divisor about half the time, then this test saves C half that amount. The branch misprediction penalty on each chip is less diff --git a/mpn/x86/k6/divrem_1.asm b/mpn/x86/k6/divrem_1.asm index 26a77618b..4bd035773 100644 --- a/mpn/x86/k6/divrem_1.asm +++ b/mpn/x86/k6/divrem_1.asm @@ -34,7 +34,7 @@ C C The code here is basically the same as mpn/x86/divrem_1.asm, but uses loop C instead of decl+jnz, since it comes out 2 cycles/limb faster. C -C A test is done to see if the high limb is less the the divisor, and if so +C A test is done to see if the high limb is less than the divisor, and if so C one less div is done. A div is 20 cycles, so assuming high<divisor about C half the time, then this test saves half that amount. The branch C misprediction penalty is less than that. diff --git a/mpn/x86/mod_1.asm b/mpn/x86/mod_1.asm index d5d88f94c..e88d0e434 100644 --- a/mpn/x86/mod_1.asm +++ b/mpn/x86/mod_1.asm @@ -40,7 +40,7 @@ C mpn/generic/mod_1.c, but has the advantage that we get the desired divl C instruction even when gcc is not being used (where longlong.h only has the C rather slow generic C udiv_qrnnd(). C -C A test is done to see if the high limb is less the the divisor, and if so +C A test is done to see if the high limb is less than the divisor, and if so C one less div is done. A div is between 20 and 40 cycles on the various C x86s, so assuming high<divisor about half the time, then this test saves C half that amount. The branch misprediction penalty on each chip is less diff --git a/scanf/sscanffuns.c b/scanf/sscanffuns.c index d728e6bf8..e5e6f3f8d 100644 --- a/scanf/sscanffuns.c +++ b/scanf/sscanffuns.c @@ -39,7 +39,7 @@ step (const char **sp, int n) { ASSERT (n >= 0); - /* shouldn't push us past the the end of the string */ + /* shouldn't push us past the end of the string */ #if WANT_ASSERT { int i; |