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authorTorbjorn Granlund <tg@gmplib.org>2016-12-01 15:40:49 +0100
committerTorbjorn Granlund <tg@gmplib.org>2016-12-01 15:40:49 +0100
commit4dec4563a3c8dc4f0a23ae9e5d299ada6a71543d (patch)
tree48c8e9701f6d9db7cda339352aedc7b8f69b3638 /NEWS
parent8585b84d9cb5c505ac708e1748f4a02c326d4ff3 (diff)
downloadgmp-4dec4563a3c8dc4f0a23ae9e5d299ada6a71543d.tar.gz
Insert 6.1.1 items.
Diffstat (limited to 'NEWS')
-rw-r--r--NEWS15
1 files changed, 13 insertions, 2 deletions
diff --git a/NEWS b/NEWS
index debf3bb48..ba5a09736 100644
--- a/NEWS
+++ b/NEWS
@@ -1,4 +1,4 @@
-Copyright 1996, 1999-2015 Free Software Foundation, Inc.
+Copyright 1996, 1999-2016 Free Software Foundation, Inc.
Verbatim copying and distribution of this entire article is permitted in any
medium, provided this notice is preserved.
@@ -9,6 +9,17 @@ Changes between GMP version 6.1.* and 6.2.0
FEATURES
* New C++ functions factorial and primorial for mpz_class.
+Changes between GMP version 6.1.0 and 6.1.1
+
+ BUGS FIXED
+ * Make Intel Broadwell configurations work on Windows.
+
+ FEATURES
+ * Work around faulty cpuid on some recent Intel chips (this allows GMP to run
+ on Skylake Pentiums).
+
+ * Support thumb-less ARM chips.
+
Changes between GMP version 6.0.* and 6.1.0
BUGS FIXED
@@ -29,7 +40,7 @@ Changes between GMP version 6.0.* and 6.1.0
* Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI.
SPEEDUPS
- * Speedup for Intel Broadwell and Skylake though assembly code making use of
+ * Speedup for Intel Broadwell and Skylake through assembly code making use of
new ADX instructions.
* Square root is now faster when the remainder is not needed. Also the speed