diff options
| author | Torbjorn Granlund <tege@gmplib.org> | 2011-01-31 23:32:05 +0100 |
|---|---|---|
| committer | Torbjorn Granlund <tege@gmplib.org> | 2011-01-31 23:32:05 +0100 |
| commit | b6e5a2bb0af7d7e97786eaaf7de52bade0be3304 (patch) | |
| tree | ab71b5aafd44ff419739e71093b74dce2386a3bf /config.guess | |
| parent | 5d75e0bf086627d1326fd4e8b2157fea59d9415b (diff) | |
| download | gmp-b6e5a2bb0af7d7e97786eaaf7de52bade0be3304.tar.gz | |
Support 'coreinhm' and 'coreisbr'.
Diffstat (limited to 'config.guess')
| -rwxr-xr-x | config.guess | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/config.guess b/config.guess index 145ed90a4..da6393e11 100755 --- a/config.guess +++ b/config.guess @@ -756,18 +756,18 @@ main () else if (model <= 0x0c) modelstr = "pentium3"; else if (model <= 0x0e) modelstr = "pentiumm"; else if (model <= 0x19) cpu_64bit = 1, modelstr = "core2"; - else if (model == 0x1a) cpu_64bit = 1, modelstr = "corei"; /* NHM Gainestown */ + else if (model == 0x1a) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Gainestown */ else if (model == 0x1c) cpu_64bit = 1, modelstr = "atom"; /* Silverthorne */ else if (model == 0x1d) cpu_64bit = 1, modelstr = "core2"; /* PNR Dunnington */ - else if (model == 0x1e) cpu_64bit = 1, modelstr = "corei"; /* NHM Lynnfield/Jasper */ - else if (model == 0x25) cpu_64bit = 1, modelstr = "corei"; /* WSM Clarkdale/Arrandale */ + else if (model == 0x1e) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Lynnfield/Jasper */ + else if (model == 0x25) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Clarkdale/Arrandale */ else if (model == 0x26) cpu_64bit = 1, modelstr = "atom"; /* Lincroft */ else if (model == 0x27) cpu_64bit = 1, modelstr = "atom"; /* Saltwell */ - else if (model == 0x2a) cpu_64bit = 1, modelstr = "corei"; /* SB */ - else if (model == 0x2c) cpu_64bit = 1, modelstr = "corei"; /* WSM Gulftown */ - else if (model == 0x2d) cpu_64bit = 1, modelstr = "corei"; /* SBC-EP */ - else if (model == 0x2e) cpu_64bit = 1, modelstr = "corei"; /* NHM Beckton */ - else if (model == 0x2f) cpu_64bit = 1, modelstr = "corei"; /* WSM Eagleton */ + else if (model == 0x2a) cpu_64bit = 1, modelstr = "coreisbr"; /* SB */ + else if (model == 0x2c) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Gulftown */ + else if (model == 0x2d) cpu_64bit = 1, modelstr = "coreisrb"; /* SBC-EP */ + else if (model == 0x2e) cpu_64bit = 1, modelstr = "coreinhm"; /* NHM Beckton */ + else if (model == 0x2f) cpu_64bit = 1, modelstr = "coreiwsm"; /* WSM Eagleton */ else cpu_64bit = 1, modelstr = "corei"; /* default */ break; case 15: |