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| author | Torbjorn Granlund <tg@gmplib.org> | 2019-08-18 22:28:02 +0200 |
|---|---|---|
| committer | Torbjorn Granlund <tg@gmplib.org> | 2019-08-18 22:28:02 +0200 |
| commit | 8771dfed6865ff9163d68089c1f8ea0b4520d27f (patch) | |
| tree | efc5a23b1f19b939d3516e49b6db459205deebd8 /longlong.h | |
| parent | 72537ffc8725061009cd4a002357eda535413ac0 (diff) | |
| download | gmp-8771dfed6865ff9163d68089c1f8ea0b4520d27f.tar.gz | |
(arm32 sub_ddmmss): Define separately for thumb and non-thumb as rsc instruction is missing for thumb.
Diffstat (limited to 'longlong.h')
| -rw-r--r-- | longlong.h | 50 |
1 files changed, 39 insertions, 11 deletions
diff --git a/longlong.h b/longlong.h index 5cfe354bd..dc8d2dd56 100644 --- a/longlong.h +++ b/longlong.h @@ -446,11 +446,43 @@ long __MPN(count_leading_zeros) (UDItype); : "=r" (sh), "=&r" (sl) \ : "r" (ah), "rI" (bh), "%r" (al), "rI" (bl) __CLOBBER_CC); \ } while (0) -/* FIXME: Extend the immediate range for the low word by using both - ADDS and SUBS, since they set carry in the same way. */ +/* FIXME: Extend the immediate range for the low word by using both ADDS and + SUBS, since they set carry in the same way. Note: We need separate + definitions for thumb and non-thumb to to th absense of RSC under thumb. */ +#if defined (__thumb__) #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ do { \ - if (__builtin_constant_p (al)) \ + if (__builtin_constant_p (ah) && __builtin_constant_p (bh) \ + && (ah) == (bh)) \ + __asm__ ("subs\t%1, %2, %3\n\tsbc\t%0, %0, %0" \ + : "=r" (sh), "=r" (sl) \ + : "r" (al), "rI" (bl) __CLOBBER_CC); \ + else if (__builtin_constant_p (al)) \ + { \ + __asm__ ("rsbs\t%1, %5, %4\n\tsbc\t%0, %2, %3" \ + : "=r" (sh), "=&r" (sl) \ + : "r" (ah), "rI" (bh), "rI" (al), "r" (bl) __CLOBBER_CC); \ + } \ + else if (__builtin_constant_p (bl)) \ + { \ + __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \ + : "=r" (sh), "=&r" (sl) \ + : "r" (ah), "rI" (bh), "r" (al), "rI" (bl) __CLOBBER_CC); \ + } \ + else \ + __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \ + : "=r" (sh), "=&r" (sl) \ + : "r" (ah), "rI" (bh), "r" (al), "rI" (bl) __CLOBBER_CC);\ + } while (0) +#else +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (ah) && __builtin_constant_p (bh) \ + && (ah) == (bh)) \ + __asm__ ("subs\t%1, %2, %3\n\tsbc\t%0, %0, %0" \ + : "=r" (sh), "=r" (sl) \ + : "r" (al), "rI" (bl) __CLOBBER_CC); \ + else if (__builtin_constant_p (al)) \ { \ if (__builtin_constant_p (ah)) \ __asm__ ("rsbs\t%1, %5, %4\n\trsc\t%0, %3, %2" \ @@ -474,20 +506,16 @@ long __MPN(count_leading_zeros) (UDItype); } \ else if (__builtin_constant_p (bl)) \ { \ - if (__builtin_constant_p (bh)) \ - __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \ - : "=r" (sh), "=&r" (sl) \ - : "r" (ah), "rI" (bh), "r" (al), "rI" (bl) __CLOBBER_CC); \ - else \ - __asm__ ("subs\t%1, %4, %5\n\trsc\t%0, %3, %2" \ - : "=r" (sh), "=&r" (sl) \ - : "rI" (ah), "r" (bh), "r" (al), "rI" (bl) __CLOBBER_CC); \ + __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \ + : "=r" (sh), "=&r" (sl) \ + : "r" (ah), "rI" (bh), "r" (al), "rI" (bl) __CLOBBER_CC); \ } \ else /* only bh might be a constant */ \ __asm__ ("subs\t%1, %4, %5\n\tsbc\t%0, %2, %3" \ : "=r" (sh), "=&r" (sl) \ : "r" (ah), "rI" (bh), "r" (al), "rI" (bl) __CLOBBER_CC);\ } while (0) +#endif #if defined (__ARM_ARCH_2__) || defined (__ARM_ARCH_2A__) \ || defined (__ARM_ARCH_3__) #define umul_ppmm(xh, xl, a, b) \ |