Rewrite.

1 files changed, 57 insertions, 138 deletions

diff --git a/mpn/alpha/aorslsh1_n.asm b/mpn/alpha/aorslsh1_n.asm
index 3694f7876..8e1b78e5c 100644
--- a/mpn/alpha/aorslsh1_n.asm
+++ b/mpn/alpha/aorslsh1_n.asm
@@ -1,6 +1,6 @@
 dnl  Alpha mpn_addlsh1_n/mpn_sublsh1_n -- rp[] = up[] +- (vp[] << 1).
 
-dnl  Copyright 2003 Free Software Foundation, Inc.
+dnl  Copyright 2003, 2013 Free Software Foundation, Inc.
 
 dnl  This file is part of the GNU MP Library.
 
@@ -20,17 +20,10 @@ dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.
 include(`../config.m4')
 
 C      cycles/limb
-C EV4:    12.5
+C EV4:     ?
 C EV5:     6.25
-C EV6:     4.375 (i.e., worse than separate mpn_lshift and mpn_add_n at 3.875)
+C EV6:     4.5
 
-C TODO
-C  * Write special version for ev6, as this is a slowdown for 100 < n < 2200
-C    compared to separate mpn_lshift and mpn_add_n.
-C  * Use addq instead of sll for left shift, and similarly cmplt instead of srl
-C    for right shift.
-
-dnl  INPUT PARAMETERS
 define(`rp',`r16')
 define(`up',`r17')
 define(`vp',`r18')
@@ -38,12 +31,8 @@ define(`n', `r19')
 
 define(`u0', `r8')
 define(`u1', `r1')
-define(`u2', `r2')
-define(`u3', `r3')
 define(`v0', `r4')
 define(`v1', `r5')
-define(`v2', `r6')
-define(`v3', `r7')
 
 define(`cy0', `r0')
 define(`cy1', `r20')
@@ -67,168 +56,98 @@ MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_sublsh1_n)
 
 ASM_START()
 PROLOGUE(func)
-	lda	n, -4(n)
-	bis	r31, r31, cy1
-	and	n, 3, r1
-	beq	r1, $Lb00
-	cmpeq	r1, 1, r2
-	bne	r2, $Lb01
-	cmpeq	r1, 2, r2
-	bne	r2, $Lb10
-$Lb11:	C n = 3, 7, 11, ...
-	ldq	v0, 0(vp)
-	ldq	u0, 0(up)
-	ldq	v1, 8(vp)
-	ldq	u1, 8(up)
-	ldq	v2, 16(vp)
-	ldq	u2, 16(up)
-	lda	vp, 24(vp)
-	lda	up, 24(up)
-	bge	n, $Loop
-	br	r31, $Lcj3
-$Lb10:	C n = 2, 6, 10, ...
-	bis	r31, r31, cy0
-	ldq	v1, 0(vp)
+	and	n, 2, cy0
+	blbs	n, L(bx1)
+L(bx0):	ldq	v1, 0(vp)
 	ldq	u1, 0(up)
-	ldq	v2, 8(vp)
-	ldq	u2, 8(up)
+	nop
+	bne	cy0, L(b10)
+
+L(b00):	lda	vp, 48(vp)
+	lda	up, -16(up)
 	lda	rp, -8(rp)
-	blt	n, $Lcj2
-	ldq	v3, 16(vp)
-	ldq	u3, 16(up)
-	lda	vp, 48(vp)
-	lda	up, 16(up)
-	br	r31, $LL10
-$Lb01:	C n = 1, 5, 9, ...
-	ldq	v2, 0(vp)
-	ldq	u2, 0(up)
-	lda	rp, -16(rp)
-	blt	n, $Lcj1
-	ldq	v3, 8(vp)
-	ldq	u3, 8(up)
-	ldq	v0, 16(vp)
-	ldq	u0, 16(up)
-	lda	vp, 40(vp)
-	lda	up, 8(up)
-	lda	rp, 32(rp)
-	br	r31, $LL01
-$Lb00:	C n = 4, 8, 12, ...
-	bis	r31, r31, cy0
-	ldq	v3, 0(vp)
-	ldq	u3, 0(up)
-	ldq	v0, 8(vp)
-	ldq	u0, 8(up)
-	ldq	v1, 16(vp)
-	ldq	u1, 16(up)
-	lda	vp, 32(vp)
+	br	r31, L(lo0)
+
+L(b10):	lda	vp, 32(vp)
 	lda	rp, 8(rp)
-	br	r31, $LL00x
+	lda	cy0, 0(r31)
+	br	r31, L(lo2)
+
+L(bx1):	ldq	v0, 0(vp)
+	ldq	u0, 0(up)
+	lda	cy1, 0(r31)
+	beq	cy0, L(b01)
+
+L(b11):	lda	vp, 40(vp)
+	lda	up, -24(up)
+	lda	rp, 16(rp)
+	br	r31, L(lo3)
+
+L(b01):	lda	n, -4(n)
+	ble	n, L(end)
+	lda	vp, 24(vp)
+	lda	up, -8(up)
+
 	ALIGN(16)
-C 0
-$Loop:	sll	v0, 1, sl	C left shift vlimb
-	ldq	v3, 0(vp)
-C 1
+L(top):	addq	v0, v0, sl	C left shift vlimb
+	ldq	v1, -16(vp)
 	ADDSUB	u0, sl, ps	C ulimb + (vlimb << 1)
-	ldq	u3, 0(up)
-C 2
+	cmplt	v0, r31, cy0	C carry out #1
+	ldq	u1, 16(up)
 	ADDSUB	ps, cy1, rr	C consume carry from previous operation
-	srl	v0, 63, cy0	C carry out #1
-C 3
 	CARRY(	ps, u0, cy)	C carry out #2
 	stq	rr, 0(rp)
-C 4
 	addq	cy, cy0, cy0	C combine carry out #1 and #2
 	CARRY(	rr, ps, cy)	C carry out #3
-C 5
 	addq	cy, cy0, cy0	C final carry out
 	lda	vp, 32(vp)	C bookkeeping
-C 6
-$LL10:	sll	v1, 1, sl
-	ldq	v0, -24(vp)
-C 7
+L(lo0):	addq	v1, v1, sl
+	ldq	v0, -40(vp)
 	ADDSUB	u1, sl, ps
-	ldq	u0, 8(up)
-C 8
+	cmplt	v1, r31, cy1
+	ldq	u0, 24(up)
 	ADDSUB	ps, cy0, rr
-	srl	v1, 63, cy1
-C 9
 	CARRY(	ps, u1, cy)
 	stq	rr, 8(rp)
-C 10
 	addq	cy, cy1, cy1
 	CARRY(	rr, ps, cy)
-C 11
 	addq	cy, cy1, cy1
 	lda	rp, 32(rp)	C bookkeeping
-C 12
-$LL01:	sll	v2, 1, sl
-	ldq	v1, -16(vp)
-C 13
-	ADDSUB	u2, sl, ps
-	ldq	u1, 16(up)
-C 14
+L(lo3):	addq	v0, v0, sl
+	ldq	v1, -32(vp)
+	ADDSUB	u0, sl, ps
+	cmplt	v0, r31, cy0
+	ldq	u1, 32(up)
 	ADDSUB	ps, cy1, rr
-	srl	v2, 63, cy0
-C 15
-	CARRY(	ps, u2, cy)
+	CARRY(	ps, u0, cy)
 	stq	rr, -16(rp)
-C 16
 	addq	cy, cy0, cy0
 	CARRY(	rr, ps, cy)
-C 17
 	addq	cy, cy0, cy0
-$LL00x:	lda	up, 32(up)	C bookkeeping
-C 18
-	sll	v3, 1, sl
-	ldq	v2, -8(vp)
-C 19
-	ADDSUB	u3, sl, ps
-	ldq	u2, -8(up)
-C 20
+	lda	up, 32(up)	C bookkeeping
+L(lo2):	addq	v1, v1, sl
+	ldq	v0, -24(vp)
+	ADDSUB	u1, sl, ps
+	cmplt	v1, r31, cy1
+	ldq	u0, 8(up)
 	ADDSUB	ps, cy0, rr
-	srl	v3, 63, cy1
-C 21
-	CARRY(	ps, u3, cy)
+	CARRY(	ps, u1, cy)
 	stq	rr, -8(rp)
-C 22
 	addq	cy, cy1, cy1
 	CARRY(	rr, ps, cy)
-C 23
 	addq	cy, cy1, cy1
 	lda	n, -4(n)	C bookkeeping
-C 24
-	bge	n, $Loop
+	bgt	n, L(top)
 
-$Lcj3:	sll	v0, 1, sl
+L(end):	addq	v0, v0, sl
 	ADDSUB	u0, sl, ps
 	ADDSUB	ps, cy1, rr
-	srl	v0, 63, cy0
+	cmplt	v0, r31, cy0
 	CARRY(	ps, u0, cy)
 	stq	rr, 0(rp)
 	addq	cy, cy0, cy0
 	CARRY(	rr, ps, cy)
-	addq	cy, cy0, cy0
-
-$Lcj2:	sll	v1, 1, sl
-	ADDSUB	u1, sl, ps
-	ADDSUB	ps, cy0, rr
-	srl	v1, 63, cy1
-	CARRY(	ps, u1, cy)
-	stq	rr, 8(rp)
-	addq	cy, cy1, cy1
-	CARRY(	rr, ps, cy)
-	addq	cy, cy1, cy1
-
-$Lcj1:	sll	v2, 1, sl
-	ADDSUB	u2, sl, ps
-	ADDSUB	ps, cy1, rr
-	srl	v2, 63, cy0
-	CARRY(	ps, u2, cy)
-	stq	rr, 16(rp)
-	addq	cy, cy0, cy0
-	CARRY(	rr, ps, cy)
-	addq	cy, cy0, cy0
-
+	addq	cy, cy0, r0
 	ret	r31,(r26),1
 EPILOGUE()
 ASM_END()