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author | Torbjorn Granlund <tg@gmplib.org> | 2018-11-07 09:38:44 +0100 |
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committer | Torbjorn Granlund <tg@gmplib.org> | 2018-11-07 09:38:44 +0100 |
commit | a2d7d36530f2dc94339749a6435b0d9fbfea7121 (patch) | |
tree | 948af94576a2f956de4a8280227c0ffb3d5107fc /mpn/arm | |
parent | 84b30f81656b12bb1ee18a86061bfe87f91323ea (diff) | |
download | gmp-a2d7d36530f2dc94339749a6435b0d9fbfea7121.tar.gz |
Provide some arm a12/a17 optimised files.
Diffstat (limited to 'mpn/arm')
-rw-r--r-- | mpn/arm/v7a/cora17/addmul_1.asm | 34 | ||||
-rw-r--r-- | mpn/arm/v7a/cora17/gmp-mparam.h | 175 | ||||
-rw-r--r-- | mpn/arm/v7a/cora17/mod_34lsub1.asm | 121 | ||||
-rw-r--r-- | mpn/arm/v7a/cora17/mul_1.asm | 34 | ||||
-rw-r--r-- | mpn/arm/v7a/cora17/submul_1.asm | 34 |
5 files changed, 398 insertions, 0 deletions
diff --git a/mpn/arm/v7a/cora17/addmul_1.asm b/mpn/arm/v7a/cora17/addmul_1.asm new file mode 100644 index 000000000..c11ed47f7 --- /dev/null +++ b/mpn/arm/v7a/cora17/addmul_1.asm @@ -0,0 +1,34 @@ +dnl ARM mpn_addmul_1 + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +MULFUNC_PROLOGUE(mpn_addmul_1) +include_mpn(`arm/v6/addmul_1.asm') diff --git a/mpn/arm/v7a/cora17/gmp-mparam.h b/mpn/arm/v7a/cora17/gmp-mparam.h new file mode 100644 index 000000000..152b403ff --- /dev/null +++ b/mpn/arm/v7a/cora17/gmp-mparam.h @@ -0,0 +1,175 @@ +/* gmp-mparam.h -- Compiler/machine parameter header file. + +Copyright 2018 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +#define GMP_LIMB_BITS 32 +#define GMP_LIMB_BYTES 4 + +/* 1800 MHz Cortex-A17 with Neon (in spite of file position) */ +/* FFT tuning limit = 0.5 M */ +/* Generated by tuneup.c, 2018-10-27, gcc 6.3 */ + +#define MOD_1_NORM_THRESHOLD 0 /* always */ +#define MOD_1_UNNORM_THRESHOLD 0 /* always */ +#define MOD_1N_TO_MOD_1_1_THRESHOLD 5 +#define MOD_1U_TO_MOD_1_1_THRESHOLD 4 +#define MOD_1_1_TO_MOD_1_2_THRESHOLD 8 +#define MOD_1_2_TO_MOD_1_4_THRESHOLD MP_SIZE_T_MAX +#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 12 +#define USE_PREINV_DIVREM_1 1 /* native */ +#define DIV_QR_1N_PI1_METHOD 1 +#define DIV_QR_1_NORM_THRESHOLD MP_SIZE_T_MAX /* never */ +#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */ +#define DIV_QR_2_PI2_THRESHOLD MP_SIZE_T_MAX /* never */ +#define DIVEXACT_1_THRESHOLD 0 /* always (native) */ +#define BMOD_1_TO_MOD_1_THRESHOLD 42 + +#define DIV_1_VS_MUL_1_PERCENT 208 + +#define MUL_TOOM22_THRESHOLD 38 +#define MUL_TOOM33_THRESHOLD 131 +#define MUL_TOOM44_THRESHOLD 208 +#define MUL_TOOM6H_THRESHOLD 303 +#define MUL_TOOM8H_THRESHOLD 454 + +#define MUL_TOOM32_TO_TOOM43_THRESHOLD 141 +#define MUL_TOOM32_TO_TOOM53_THRESHOLD 176 +#define MUL_TOOM42_TO_TOOM53_THRESHOLD 130 +#define MUL_TOOM42_TO_TOOM63_THRESHOLD 145 +#define MUL_TOOM43_TO_TOOM54_THRESHOLD 178 + +#define SQR_BASECASE_THRESHOLD 0 /* always (native) */ +#define SQR_TOOM2_THRESHOLD 58 +#define SQR_TOOM3_THRESHOLD 189 +#define SQR_TOOM4_THRESHOLD 348 +#define SQR_TOOM6_THRESHOLD 426 +#define SQR_TOOM8_THRESHOLD 608 + +#define MULMID_TOOM42_THRESHOLD 62 + +#define MULMOD_BNM1_THRESHOLD 22 +#define SQRMOD_BNM1_THRESHOLD 30 + +#define MUL_FFT_MODF_THRESHOLD 565 /* k = 5 */ +#define MUL_FFT_TABLE3 \ + { { 565, 5}, { 29, 6}, { 15, 5}, { 31, 6}, \ + { 16, 5}, { 33, 6}, { 17, 5}, { 35, 6}, \ + { 29, 7}, { 15, 6}, { 33, 7}, { 17, 6}, \ + { 36, 7}, { 19, 6}, { 39, 7}, { 29, 8}, \ + { 15, 7}, { 35, 8}, { 19, 7}, { 43, 8}, \ + { 23, 7}, { 49, 8}, { 27, 7}, { 55, 9}, \ + { 15, 8}, { 31, 7}, { 63, 8}, { 43, 9}, \ + { 23, 8}, { 55, 9}, { 31, 8}, { 67, 9}, \ + { 39, 8}, { 83, 9}, { 47, 8}, { 95, 9}, \ + { 55,10}, { 31, 9}, { 79,10}, { 47, 9}, \ + { 95,11}, { 31,10}, { 63, 9}, { 135,10}, \ + { 79, 9}, { 159,10}, { 95, 9}, { 191,10}, \ + { 111,11}, { 63,10}, { 143, 9}, { 287, 8}, \ + { 575,10}, { 159,11}, { 95,10}, { 191, 9}, \ + { 383, 8}, { 767, 9}, { 399,12}, { 63,11}, \ + { 127,10}, { 255, 9}, { 511, 8}, { 1023, 9}, \ + { 543,10}, { 287, 9}, { 575,10}, { 303,11}, \ + { 159,10}, { 319, 9}, { 639,10}, { 335, 9}, \ + { 671,10}, { 351, 9}, { 703,10}, { 367, 9}, \ + { 735,11}, { 191,10}, { 383, 9}, { 767,10}, \ + { 399, 9}, { 799,10}, { 415, 9}, { 831,10}, \ + { 431, 9}, { 863,11}, { 223,10}, { 447,12}, \ + { 4096,13}, { 8192,14}, { 16384,15}, { 32768,16} } +#define MUL_FFT_TABLE3_SIZE 92 +#define MUL_FFT_THRESHOLD 5760 + +#define SQR_FFT_MODF_THRESHOLD 525 /* k = 5 */ +#define SQR_FFT_TABLE3 \ + { { 525, 5}, { 29, 6}, { 15, 5}, { 33, 6}, \ + { 29, 7}, { 15, 6}, { 33, 7}, { 17, 6}, \ + { 36, 7}, { 19, 6}, { 39, 7}, { 29, 8}, \ + { 15, 7}, { 35, 8}, { 19, 7}, { 41, 8}, \ + { 23, 7}, { 49, 8}, { 27, 9}, { 15, 8}, \ + { 43, 9}, { 23, 8}, { 55,10}, { 15, 9}, \ + { 31, 8}, { 67, 9}, { 39, 8}, { 79, 9}, \ + { 47, 8}, { 95, 9}, { 55,10}, { 31, 9}, \ + { 79,10}, { 47, 9}, { 95,11}, { 31,10}, \ + { 63, 9}, { 135,10}, { 79, 9}, { 159,10}, \ + { 95, 9}, { 191,10}, { 111,11}, { 63,10}, \ + { 143, 9}, { 287,10}, { 159, 9}, { 319,11}, \ + { 95,10}, { 191, 9}, { 383, 8}, { 767, 9}, \ + { 399,12}, { 63,11}, { 127, 9}, { 511,10}, \ + { 271, 9}, { 543,10}, { 287, 9}, { 575,10}, \ + { 303,11}, { 159,10}, { 319, 9}, { 639,10}, \ + { 335, 9}, { 671,10}, { 351, 9}, { 703,10}, \ + { 367,11}, { 191,10}, { 383, 9}, { 767,10}, \ + { 399, 9}, { 799,10}, { 415, 9}, { 831,10}, \ + { 431, 9}, { 863,10}, { 447,12}, { 4096,13}, \ + { 8192,14}, { 16384,15}, { 32768,16} } +#define SQR_FFT_TABLE3_SIZE 83 +#define SQR_FFT_THRESHOLD 4736 + +#define MULLO_BASECASE_THRESHOLD 0 /* always */ +#define MULLO_DC_THRESHOLD 25 +#define MULLO_MUL_N_THRESHOLD 13463 +#define SQRLO_BASECASE_THRESHOLD 0 /* always */ +#define SQRLO_DC_THRESHOLD 26 +#define SQRLO_SQR_THRESHOLD 8907 + +#define DC_DIV_QR_THRESHOLD 35 +#define DC_DIVAPPR_Q_THRESHOLD 111 +#define DC_BDIV_QR_THRESHOLD 32 +#define DC_BDIV_Q_THRESHOLD 108 + +#define INV_MULMOD_BNM1_THRESHOLD 74 +#define INV_NEWTON_THRESHOLD 173 +#define INV_APPR_THRESHOLD 123 + +#define BINV_NEWTON_THRESHOLD 303 +#define REDC_1_TO_REDC_2_THRESHOLD 2 +#define REDC_2_TO_REDC_N_THRESHOLD 159 + +#define MU_DIV_QR_THRESHOLD 1895 +#define MU_DIVAPPR_Q_THRESHOLD 1895 +#define MUPI_DIV_QR_THRESHOLD 73 +#define MU_BDIV_QR_THRESHOLD 1685 +#define MU_BDIV_Q_THRESHOLD 2089 + +#define POWM_SEC_TABLE 5,19,122,480,1486 + +#define GET_STR_DC_THRESHOLD 14 +#define GET_STR_PRECOMPUTE_THRESHOLD 28 +#define SET_STR_DC_THRESHOLD 108 +#define SET_STR_PRECOMPUTE_THRESHOLD 630 + +#define FAC_DSC_THRESHOLD 282 +#define FAC_ODD_THRESHOLD 55 + +#define MATRIX22_STRASSEN_THRESHOLD 28 +#define HGCD_THRESHOLD 58 +#define HGCD_APPR_THRESHOLD 52 +#define HGCD_REDUCE_THRESHOLD 3524 +#define GCD_DC_THRESHOLD 358 +#define GCDEXT_DC_THRESHOLD 249 +#define JACOBI_BASE_METHOD 4 diff --git a/mpn/arm/v7a/cora17/mod_34lsub1.asm b/mpn/arm/v7a/cora17/mod_34lsub1.asm new file mode 100644 index 000000000..39e5a15fb --- /dev/null +++ b/mpn/arm/v7a/cora17/mod_34lsub1.asm @@ -0,0 +1,121 @@ +dnl ARM mpn_mod_34lsub1 -- remainder modulo 2^24-1. + +dnl Copyright 2012, 2013, 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +C cycles/limb +C StrongARM ? +C XScale ? +C Cortex-A5 2.67 +C Cortex-A7 2.37 +C Cortex-A8 2.34 +C Cortex-A9 ? +C Cortex-A15 1.39 +C Cortex-A17 1.60 +C Cortex-A53 2.51 + +define(`ap', r0) +define(`n', r1) + +C mp_limb_t mpn_mod_34lsub1 (mp_srcptr up, mp_size_t n) + +C TODO +C * Write cleverer summation code. +C * Consider loading 6 64-bit aligned registers at a time, to approach 1 c/l. + +ASM_START() + TEXT + ALIGN(32) +PROLOGUE(mpn_mod_34lsub1) + push { r4, r5, r6, r7 } + + subs n, n, #3 + mov r7, #0 + blt L(le2) C n <= 2 + + ldmia ap!, { r2, r3, r12 } + subs n, n, #3 + blt L(sum) C n <= 5 + mov r7, #0 + b L(mid) + +L(top): adds r2, r2, r4 + adcs r3, r3, r5 + adcs r12, r12, r6 + adc r7, r7, #0 +L(mid): ldmia ap!, { r4, r5, r6 } + subs n, n, #3 + bpl L(top) + + adds r2, r2, r4 + adcs r3, r3, r5 + adcs r12, r12, r6 + adc r7, r7, #0 C r7 <= 1 + +L(sum): cmn n, #2 + movlo r4, #0 + ldrhs r4, [ap], #4 + movls r5, #0 + ldrhi r5, [ap], #4 + + adds r2, r2, r4 + adcs r3, r3, r5 + adcs r12, r12, #0 + adc r7, r7, #0 C r7 <= 2 + +L(sum2): + bic r0, r2, #0xff000000 + add r0, r0, r2, lsr #24 + add r0, r0, r7 + + mov r7, r3, lsl #8 + bic r2, r7, #0xff000000 + add r0, r0, r2 + add r0, r0, r3, lsr #16 + + mov r2, r12, lsl #16 + bic r1, r2, #0xff000000 + add r0, r0, r1 + add r0, r0, r12, lsr #8 + + pop { r4, r5, r6, r7 } + return lr + +L(le2): cmn n, #1 + bne L(1) + ldmia ap!, { r2, r3 } + mov r12, #0 + b L(sum2) +L(1): ldr r2, [ap] + bic r0, r2, #0xff000000 + add r0, r0, r2, lsr #24 + pop { r4, r5, r6, r7 } + return lr +EPILOGUE() diff --git a/mpn/arm/v7a/cora17/mul_1.asm b/mpn/arm/v7a/cora17/mul_1.asm new file mode 100644 index 000000000..d9b6042c3 --- /dev/null +++ b/mpn/arm/v7a/cora17/mul_1.asm @@ -0,0 +1,34 @@ +dnl ARM mpn_mul_1 + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +MULFUNC_PROLOGUE(mpn_mul_1) +include_mpn(`arm/v6/mul_1.asm') diff --git a/mpn/arm/v7a/cora17/submul_1.asm b/mpn/arm/v7a/cora17/submul_1.asm new file mode 100644 index 000000000..f3e8139ec --- /dev/null +++ b/mpn/arm/v7a/cora17/submul_1.asm @@ -0,0 +1,34 @@ +dnl ARM mpn_submul_1 + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +MULFUNC_PROLOGUE(mpn_submul_1) +include_mpn(`arm/v6/submul_1.asm') |