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| author | tege <tege@gmplib.org> | 2002-09-13 21:30:40 +0200 |
|---|---|---|
| committer | tege <tege@gmplib.org> | 2002-09-13 21:30:40 +0200 |
| commit | 4348f15676d9db16fb25068065c564f5a97fe47f (patch) | |
| tree | 813cec3aee4526bf123667519ff757ccc04529fb /mpn/mips64 | |
| parent | 1fa201ed1818d5ef6374b52cfe274cb55bef5e90 (diff) | |
| download | gmp-4348f15676d9db16fb25068065c564f5a97fe47f.tar.gz | |
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Diffstat (limited to 'mpn/mips64')
| -rw-r--r-- | mpn/mips64/README | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/mpn/mips64/README b/mpn/mips64/README index 1d58ad600..53dfd5201 100644 --- a/mpn/mips64/README +++ b/mpn/mips64/README @@ -41,6 +41,11 @@ RELEVANT OPTIMIZATION ISSUES cycles, contrary to the SGI documentation. There seem to be 3 or 4 possible latencies. +4. The R1x000 processors can issue one floating-point operation, two integer + operations, and one memory operation per cycle. The FPU has very short + latencies, while the integer multiply unit is non-pipelined. We should + therefore write fp based mpn_Xmul_1. + STATUS Good... |