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-rw-r--r--ChangeLog10
-rw-r--r--Makefile.am2
-rw-r--r--acinclude.m42
-rw-r--r--demos/primes.c2
-rw-r--r--doc/gmp.texi2
-rw-r--r--doc/projects.html8
-rw-r--r--doc/tasks.html6
-rw-r--r--doc/texinfo.tex4
-rw-r--r--mpn/alpha/README2
-rw-r--r--mpn/alpha/ev6/mul_1.asm2
-rw-r--r--mpn/alpha/ev6/nails/addmul_1.asm2
-rw-r--r--mpn/alpha/ev6/nails/mul_1.asm2
-rw-r--r--mpn/alpha/ev6/nails/submul_1.asm2
-rw-r--r--mpn/asm-defs.m42
-rw-r--r--mpn/cray/README2
-rw-r--r--mpn/generic/mullow_n.c2
-rw-r--r--mpn/powerpc64/mode64/dive_1.asm2
-rw-r--r--mpn/powerpc64/mode64/mode1o.asm2
-rw-r--r--mpn/x86/invert_limb.asm2
-rw-r--r--mpn/x86/k7/mod_1_4.asm2
-rw-r--r--mpn/x86/pentium4/sse2/sqr_basecase.asm2
-rw-r--r--mpz/gcd_ui.c2
-rw-r--r--mpz/powm.c2
-rw-r--r--printf/snprntffuns.c2
-rw-r--r--tests/devel/try.c4
-rw-r--r--tune/tuneup.c2
26 files changed, 37 insertions, 37 deletions
diff --git a/ChangeLog b/ChangeLog
index 91761decc..677d08021 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -5685,7 +5685,7 @@
2003-10-21 Torbjorn Granlund <tege@swox.com>
- * mpn/ia64/submul_1.asm: Slightly reschedule loop to accomodate
+ * mpn/ia64/submul_1.asm: Slightly reschedule loop to accommodate
Itanium 2 getf.sig latency.
2003-10-21 Kevin Ryde <kevin@swox.se>
@@ -8306,7 +8306,7 @@
* tune/tuneup.c (sqr_karatsuba_threshold): Initialize to
TUNE_SQR_KARATSUBA_MAX so mpn_sqr_n works for randmt initialization.
- * gmp.texi (Integer Comparisons): Remove mention of non-existant
+ * gmp.texi (Integer Comparisons): Remove mention of non-existent
mpz_cmpabs_si, reported by Conrad Curry.
* tune/speed.c, tune/speed.h, tune/common.c: Add gmp_randseed,
@@ -16158,7 +16158,7 @@
* mp.h (mp_set_memory_functions): Add missing #define.
* mpbsd/tests/allfuns.c (mp_set_memory_functions): Verify its
- existance.
+ existence.
* mpf/tests/t-misc.c (check_mpf_getset_prec): New test, verifying
reverted behaviour of mpf_get_prec.
@@ -18271,7 +18271,7 @@
* randraw.c (gmp_rand_getraw): Handle the case where (1) the LC
scheme doesn't generate even limbs and (2) more than one LC
- invokation is necessary to produce the requested number of bits.
+ invocation is necessary to produce the requested number of bits.
2000-04-05 Torbjorn Granlund <tege@swox.com>
@@ -20647,7 +20647,7 @@ Fri Oct 18 03:13:54 1996 Torbjorn Granlund <tege@quiet.matematik.su.se>
* mpn/x86/pentium/[lr]shift.S: Likewise.
* mpn/config/t-oldgas (SFLAGS): Pass -DOLD_GAS.
- * gmp-impl.h: In code for determining endianess, test also
+ * gmp-impl.h: In code for determining endianness, test also
__BIG_ENDIAN__ and __hppa__. Remove test of __NeXT__.
Wed Oct 16 03:50:34 1996 Torbjorn Granlund <tege@quiet.matematik.su.se>
diff --git a/Makefile.am b/Makefile.am
index 5632c6f92..270dd31f4 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -106,7 +106,7 @@ EXTRA_DIST += gmpxx.h
#
# $exec_prefix/include is not in the default include path for gcc built to
# the same $prefix and $exec_prefix, which might mean gmp.h is not found,
-# but anyone knowledgable enough to be playing with exec_prefix will be able
+# but anyone knowledgeable enough to be playing with exec_prefix will be able
# to address that.
#
includeexecdir = $(exec_prefix)/include
diff --git a/acinclude.m4 b/acinclude.m4
index f1185f0b0..5afc1bccb 100644
--- a/acinclude.m4
+++ b/acinclude.m4
@@ -70,7 +70,7 @@ define(GMP_FAT_SUFFIX,
dnl GMP_REMOVE_FROM_LIST(listvar,item)
dnl ----------------------------------
-dnl Emit code to remove any occurance of ITEM from $LISTVAR. ITEM can be a
+dnl Emit code to remove any occurrence of ITEM from $LISTVAR. ITEM can be a
dnl shell expression like $foo if desired.
define(GMP_REMOVE_FROM_LIST,
diff --git a/demos/primes.c b/demos/primes.c
index db763062c..5e078bd38 100644
--- a/demos/primes.c
+++ b/demos/primes.c
@@ -283,7 +283,7 @@ sieve_region (unsigned char *s, mpz_t fr, unsigned long rsize)
{
start = (prime - mpz_tdiv_ui (fr, prime)) % prime;
if (start % 2 != 0)
- start += prime; /* adjust if even divisable */
+ start += prime; /* adjust if even divisible */
}
start2 = start / 2;
}
diff --git a/doc/gmp.texi b/doc/gmp.texi
index 939f2404f..2289e4ae9 100644
--- a/doc/gmp.texi
+++ b/doc/gmp.texi
@@ -9555,7 +9555,7 @@ two 32-bit parts.
likewise @math{p48} and @math{r48}. @math{p00} and @math{p16} can be summed
with @math{r64} and @math{r80} from the previous iteration.
-For each loop then, four 49-bit quantities are transfered to the integer unit,
+For each loop then, four 49-bit quantities are transferred to the integer unit,
aligned as follows,
@tex
diff --git a/doc/projects.html b/doc/projects.html
index c88c4f296..79e5aa23b 100644
--- a/doc/projects.html
+++ b/doc/projects.html
@@ -37,7 +37,7 @@ along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
<hr>
<!-- NB. timestamp updated automatically by emacs -->
- This file current as of 17 Sep 2009. An up-to-date version is available at
+ This file current as of 15 Nov 2009. An up-to-date version is available at
<a href="http://gmplib.org/projects.html">http://gmplib.org/projects.html</a>.
Please send comments about this page to gmp-devel<font>@</font>gmplib.org.
@@ -152,9 +152,9 @@ along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
functions are desirable: acos, acosh, asin, asinh, atan, atanh, atan2,
cos, cosh, exp, log, log10, pow, sin, sinh, tan, tanh.
- <p> Note that the <a href="http://mpfr.org">mpfr</a> fuctions already provide
- these functions, and that we usually recommend new programs to use mpfr
- instead of mpf.
+ <p> Note that the <a href="http://mpfr.org">mpfr</a> functions already
+ provide these functions, and that we usually recommend new programs to use
+ mpfr instead of mpf.
<li> <strong>Faster sqrt</strong>
diff --git a/doc/tasks.html b/doc/tasks.html
index 1c3a12b29..44c2d750e 100644
--- a/doc/tasks.html
+++ b/doc/tasks.html
@@ -37,7 +37,7 @@ along with the GNU MP Library. If not, see http://www.gnu.org/licenses/.
<hr>
<!-- NB. timestamp updated automatically by emacs -->
- This file current as of 1 May 2009. An up-to-date version is available at
+ This file current as of 15 Nov 2009. An up-to-date version is available at
<a href="http://gmplib.org/tasks.html">http://gmplib.org/tasks.html</a>.
Please send comments about this page to gmp-devel<font>@</font>gmplib.org.
@@ -217,7 +217,7 @@ either already been taken care of, or have become irrelevant.
an in-place there.
<li> <code>mpf_div_ui</code>: Whether the high quotient limb is zero can be
determined by testing the dividend for high&lt;divisor. When non-zero, the
- divison can be done on prec dividend limbs instead of prec+1. The result
+ division can be done on prec dividend limbs instead of prec+1. The result
size is also known before the division, so that can be a tail call (once
the <code>TMP_ALLOC</code> is eliminated).
<li> <code>mpn_divrem_2</code> could usefully accept unnormalized divisors and
@@ -323,7 +323,7 @@ either already been taken care of, or have become irrelevant.
<code>__builtin_clzl</code> and <code>__builtin_popcountl</code> using
the corresponding CIX <code>ct</code> instructions, and
<code>__builtin_alpha_cmpbge</code>. These should give GCC more
- information about sheduling etc than the <code>asm</code> blocks
+ information about scheduling etc than the <code>asm</code> blocks
currently used in longlong.h and gmp-impl.h.
<li> Alpha Unicos: Apparently there's no <code>alloca</code> on this system,
making <code>configure</code> choose the slower
diff --git a/doc/texinfo.tex b/doc/texinfo.tex
index bac072602..9f14cc5bd 100644
--- a/doc/texinfo.tex
+++ b/doc/texinfo.tex
@@ -3,7 +3,7 @@
% Load plain if necessary, i.e., if running under initex.
\expandafter\ifx\csname fmtname\endcsname\relax\input plain\fi
%
-\def\texinfoversion{2008-04-18.10}
+\def\texinfoversion{2009-11-15.11}
%
% Copyright (C) 1985, 1986, 1988, 1990, 1991, 1992, 1993, 1994, 1995,
% 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
@@ -4814,7 +4814,7 @@ end
\chardef\maxseclevel = 3
%
% A numbered section within an unnumbered changes to unnumbered too.
-% To achive this, remember the "biggest" unnum. sec. we are currently in:
+% To achieve this, remember the "biggest" unnum. sec. we are currently in:
\chardef\unmlevel = \maxseclevel
%
% Trace whether the current chapter is an appendix or not:
diff --git a/mpn/alpha/README b/mpn/alpha/README
index 02a04a596..abefaa64c 100644
--- a/mpn/alpha/README
+++ b/mpn/alpha/README
@@ -60,7 +60,7 @@ RELEVANT OPTIMIZATION ISSUES
EV4
1. This chip has very limited store bandwidth. The on-chip L1 cache is write-
- through, and a cache line is transfered from the store buffer to the off-
+ through, and a cache line is transferred from the store buffer to the off-
chip L2 in as much 15 cycles on most systems. This delay hurts mpn_add_n,
mpn_sub_n, mpn_lshift, and mpn_rshift.
diff --git a/mpn/alpha/ev6/mul_1.asm b/mpn/alpha/ev6/mul_1.asm
index 4e89ad9d0..d3f138d69 100644
--- a/mpn/alpha/ev6/mul_1.asm
+++ b/mpn/alpha/ev6/mul_1.asm
@@ -126,7 +126,7 @@ $L_9_or_more:
mulq r2,r19,r3 C r3 = prod_low
umulh r2,r19,r21 C r21 = prod_high
beq r20,$Le1b C jump if size was == 1
- bis r31, r31, r0 C FIXME: shouldtn't need this
+ bis r31, r31, r0 C FIXME: shouldn't need this
ldq r2,0(r17) C r2 = s1_limb
lda r17,8(r17) C s1_ptr++
lda r20,-1(r20) C size--
diff --git a/mpn/alpha/ev6/nails/addmul_1.asm b/mpn/alpha/ev6/nails/addmul_1.asm
index 149195c6f..060e78d10 100644
--- a/mpn/alpha/ev6/nails/addmul_1.asm
+++ b/mpn/alpha/ev6/nails/addmul_1.asm
@@ -25,7 +25,7 @@ C EV5: 18
C EV6: 4
C TODO
-C * Reroll loop for 3.75 c/l with current 4-way unrulling.
+C * Reroll loop for 3.75 c/l with current 4-way unrolling.
C * The loop is overscheduled wrt loads and wrt multiplies, in particular
C umulh.
C * Use FP loop count and multiple exit points, that would simplify feed-in lp0
diff --git a/mpn/alpha/ev6/nails/mul_1.asm b/mpn/alpha/ev6/nails/mul_1.asm
index 534e1d35c..8e2330a8c 100644
--- a/mpn/alpha/ev6/nails/mul_1.asm
+++ b/mpn/alpha/ev6/nails/mul_1.asm
@@ -25,7 +25,7 @@ C EV5: 18
C EV6: 3.25
C TODO
-C * Reroll loop for 3.0 c/l with current 4-way unrulling.
+C * Reroll loop for 3.0 c/l with current 4-way unrolling.
C * The loop is overscheduled wrt loads and wrt multiplies, in particular
C umulh.
C * Use FP loop count and multiple exit points, that would simplify feed-in lp0
diff --git a/mpn/alpha/ev6/nails/submul_1.asm b/mpn/alpha/ev6/nails/submul_1.asm
index 41815e980..7dd7b23b8 100644
--- a/mpn/alpha/ev6/nails/submul_1.asm
+++ b/mpn/alpha/ev6/nails/submul_1.asm
@@ -25,7 +25,7 @@ C EV5: 18
C EV6: 4
C TODO
-C * Reroll loop for 3.75 c/l with current 4-way unrulling.
+C * Reroll loop for 3.75 c/l with current 4-way unrolling.
C * The loop is overscheduled wrt loads and wrt multiplies, in particular
C umulh.
C * Use FP loop count and multiple exit points, that would simplify feed-in lp0
diff --git a/mpn/asm-defs.m4 b/mpn/asm-defs.m4
index 5a3306bcb..d051ec145 100644
--- a/mpn/asm-defs.m4
+++ b/mpn/asm-defs.m4
@@ -219,7 +219,7 @@ undefine(`m4_dollarhash_1_if_noparen_test')
dnl Usage: m4wrap_prepend(string)
dnl
-dnl Prepend the given string to what will be exapanded under m4wrap at the
+dnl Prepend the given string to what will be expanded under m4wrap at the
dnl end of input.
dnl
dnl This macro exists to work around variations in m4wrap() behaviour in
diff --git a/mpn/cray/README b/mpn/cray/README
index ab3b03270..ccd743997 100644
--- a/mpn/cray/README
+++ b/mpn/cray/README
@@ -34,7 +34,7 @@ systems with cfp floating point, the main obstacle is the forming of
128-bit products. For IEEE systems, adding, and in particular
computing carry is the main issue. There are no vectorizing
unsigned-less-than instructions, and the sequence that implement that
-opetration is very long.
+operation is very long.
Shifting is the only operation that is simple to make fast. All Cray
systems have a bitblt instructions (Vi Vj,Vj<Ak and Vi Vj,Vj>Ak) that
diff --git a/mpn/generic/mullow_n.c b/mpn/generic/mullow_n.c
index 864ba8f97..57d0be610 100644
--- a/mpn/generic/mullow_n.c
+++ b/mpn/generic/mullow_n.c
@@ -1,4 +1,4 @@
-/* mpn_mullow_n -- multiply two n-limb nunbers and return the low n limbs
+/* mpn_mullow_n -- multiply two n-limb numbers and return the low n limbs
of their products.
THIS IS (FOR NOW) AN INTERNAL FUNCTION. IT IS ONLY SAFE TO REACH THIS
diff --git a/mpn/powerpc64/mode64/dive_1.asm b/mpn/powerpc64/mode64/dive_1.asm
index a4a06da26..1f482bae5 100644
--- a/mpn/powerpc64/mode64/dive_1.asm
+++ b/mpn/powerpc64/mode64/dive_1.asm
@@ -25,7 +25,7 @@ C POWER4/PPC970: 16
C POWER5: 16
C TODO
-C * Check if n=1 code is really an improvment. It probably isn't.
+C * Check if n=1 code is really an improvement. It probably isn't.
C * Perhaps remove L(norm) code, it is currently unreachable.
C * Make more similar to mode1o.asm.
diff --git a/mpn/powerpc64/mode64/mode1o.asm b/mpn/powerpc64/mode64/mode1o.asm
index dae9eae31..489ca8551 100644
--- a/mpn/powerpc64/mode64/mode1o.asm
+++ b/mpn/powerpc64/mode64/mode1o.asm
@@ -25,7 +25,7 @@ C POWER4/PPC970: 16
C POWER5: 16
C TODO
-C * Check if n=1 code is really an improvment. It probably isn't.
+C * Check if n=1 code is really an improvement. It probably isn't.
C * Make more similar to dive_1.asm.
C INPUT PARAMETERS
diff --git a/mpn/x86/invert_limb.asm b/mpn/x86/invert_limb.asm
index c9295c79a..b8c4625fa 100644
--- a/mpn/x86/invert_limb.asm
+++ b/mpn/x86/invert_limb.asm
@@ -37,7 +37,7 @@ defframe(PARAM_DIVISOR,4)
ALIGN(16)
PROLOGUE(mpn_invert_limb)
deflit(`FRAME', 0)
- C Adding the push of %ebp and the coresponding pop seems to
+ C Adding the push of %ebp and the corresponding pop seems to
C reduce running time from 46 to 43 cycles on K7. Don't know
C if this is a benchmark artefact or some alignment issue.
diff --git a/mpn/x86/k7/mod_1_4.asm b/mpn/x86/k7/mod_1_4.asm
index 2bdf4a074..5ecb4fc5a 100644
--- a/mpn/x86/k7/mod_1_4.asm
+++ b/mpn/x86/k7/mod_1_4.asm
@@ -1,4 +1,4 @@
-dnl x86-32 mpn_mod_1s_4p, requring cmov.
+dnl x86-32 mpn_mod_1s_4p, requiring cmov.
dnl Contributed to the GNU project by Torbjorn Granlund.
diff --git a/mpn/x86/pentium4/sse2/sqr_basecase.asm b/mpn/x86/pentium4/sse2/sqr_basecase.asm
index fc56f164e..a10859abc 100644
--- a/mpn/x86/pentium4/sse2/sqr_basecase.asm
+++ b/mpn/x86/pentium4/sse2/sqr_basecase.asm
@@ -30,7 +30,7 @@ C * Look into different loop alignment, we now expand the code about 50 bytes
C with possibly needless alignment.
C * Use OSP, should solve feed-in latency problems.
C * Address relative slowness for un<=3 for Pentium M. The old code is there
-C consideraly faster. (1:20/14, 2:34:32, 3:66/57)
+C considerably faster. (1:20/14, 2:34:32, 3:66/57)
C INPUT PARAMETERS
C rp sp + 4
diff --git a/mpz/gcd_ui.c b/mpz/gcd_ui.c
index e73890da4..d1a7cece7 100644
--- a/mpz/gcd_ui.c
+++ b/mpz/gcd_ui.c
@@ -1,4 +1,4 @@
-/* mpz_gcd_ui -- Calculate the greatest common divisior of two integers.
+/* mpz_gcd_ui -- Calculate the greatest common divisor of two integers.
Copyright 1994, 1996, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
Foundation, Inc.
diff --git a/mpz/powm.c b/mpz/powm.c
index 63c95e97b..c548f4704 100644
--- a/mpz/powm.c
+++ b/mpz/powm.c
@@ -241,7 +241,7 @@ pow (mpz_srcptr b, mpz_srcptr e, mpz_srcptr m, mpz_ptr r)
{
reduce (tp + mn, bp, bn, mp, mn); /* b mod m */
MPN_ZERO (tp, mn);
- mpn_tdiv_qr (qp, gp, 0L, tp, 2 * mn, mp, mn); /* unnormnalized! */
+ mpn_tdiv_qr (qp, gp, 0L, tp, 2 * mn, mp, mn); /* unnormalized! */
}
else
{
diff --git a/printf/snprntffuns.c b/printf/snprntffuns.c
index e67017469..340ee051a 100644
--- a/printf/snprntffuns.c
+++ b/printf/snprntffuns.c
@@ -45,7 +45,7 @@ along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. */
no indication how big the output would have been. It's necessary to
re-run to determine that size.
- "size-1" would mean sucess from a C99 vsnprintf, and the re-run is
+ "size-1" would mean success from a C99 vsnprintf, and the re-run is
unnecessary in this case, but we don't bother to try to detect what sort
of vsnprintf we've got. size-1 should occur rarely in normal
circumstances.
diff --git a/tests/devel/try.c b/tests/devel/try.c
index fe8c46f14..b9ec95d33 100644
--- a/tests/devel/try.c
+++ b/tests/devel/try.c
@@ -96,7 +96,7 @@ along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. */
stuff common to all functions, but the exceptions get messy.
When there's no overlap, run with both src>dst and src<dst. A subtle
- calling-conventions violation occured in a P6 copy which depended on the
+ calling-conventions violation occurred in a P6 copy which depended on the
relative location of src and dst.
multiplier_N is more or less a third source region for the addmul_N
@@ -2313,7 +2313,7 @@ call (struct each_t *e, tryfun_t function)
e->retval = CALLING_CONVENTIONS (function) (dst, base,
e->d[1].p, size);
}
- refmpn_zero (e->d[1].p, size); /* cloberred or unused */
+ refmpn_zero (e->d[1].p, size); /* clobbered or unused */
}
break;
diff --git a/tune/tuneup.c b/tune/tuneup.c
index eecdd78e3..6c22171d1 100644
--- a/tune/tuneup.c
+++ b/tune/tuneup.c
@@ -578,7 +578,7 @@ one (mp_size_t *threshold, struct param_t *param)
}
/* Stop if the threshold implied hasn't changed in a certain
- number of measurements. (It's this condition that ususally
+ number of measurements. (It's this condition that usually
stops the loop.) */
if (thresh_idx != new_thresh_idx)
since_thresh_change = 0, thresh_idx = new_thresh_idx;
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