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| author | Bruno Haible <bruno@clisp.org> | 2021-03-04 02:18:15 +0100 |
|---|---|---|
| committer | Bruno Haible <bruno@clisp.org> | 2021-03-04 02:18:15 +0100 |
| commit | 7c748055361ce5e9400d4dd460df0b84c735eff4 (patch) | |
| tree | 77c2478f6e5a1e53c117f206b46e59e903e007cd | |
| parent | 65470c21733b0850656503f09f9878e2780b7984 (diff) | |
| download | gnulib-7c748055361ce5e9400d4dd460df0b84c735eff4.tar.gz | |
asyncsafe-spin, simple-atomic: Add support for tcc/x86.
* lib/asyncsafe-spin.c (memory_barrier): With tcc/x86, don't use the
'mfence' instruction.
* lib/simple-atomic.c (memory_barrier): Likewise.
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | lib/asyncsafe-spin.c | 5 | ||||
| -rw-r--r-- | lib/simple-atomic.c | 5 |
3 files changed, 15 insertions, 0 deletions
@@ -1,5 +1,10 @@ 2021-03-03 Bruno Haible <bruno@clisp.org> + asyncsafe-spin, simple-atomic: Add support for tcc/x86. + * lib/asyncsafe-spin.c (memory_barrier): With tcc/x86, don't use the + 'mfence' instruction. + * lib/simple-atomic.c (memory_barrier): Likewise. + asyncsafe-spin, simple-atomic: Add support for tcc. * lib/asyncsafe-spin.c (memory_barrier, atomic_compare_and_swap): On i386 and x86_64, treat tcc like older GCC or clang. diff --git a/lib/asyncsafe-spin.c b/lib/asyncsafe-spin.c index cece6230d5..d0cdb390a0 100644 --- a/lib/asyncsafe-spin.c +++ b/lib/asyncsafe-spin.c @@ -202,7 +202,12 @@ memory_barrier (void) { # if defined __GNUC__ || defined __clang__ || __SUNPRO_C >= 0x590 || defined __TINYC__ # if defined __i386 || defined __x86_64__ +# if defined __TINYC__ && defined __i386 + /* Cannot use the SSE instruction "mfence" with this compiler. */ + asm volatile ("lock orl $0,(%esp)"); +# else asm volatile ("mfence"); +# endif # endif # if defined __sparc asm volatile ("membar 2"); diff --git a/lib/simple-atomic.c b/lib/simple-atomic.c index 4d5a0d832f..7c4f7e9325 100644 --- a/lib/simple-atomic.c +++ b/lib/simple-atomic.c @@ -197,7 +197,12 @@ memory_barrier (void) { # if defined __GNUC__ || defined __clang__ || __SUNPRO_C >= 0x590 || defined __TINYC__ # if defined __i386 || defined __x86_64__ +# if defined __TINYC__ && defined __i386 + /* Cannot use the SSE instruction "mfence" with this compiler. */ + asm volatile ("lock orl $0,(%esp)"); +# else asm volatile ("mfence"); +# endif # endif # if defined __sparc asm volatile ("membar 2"); |