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| author | Sreerenj Balachandran <sreerenj.balachandran@intel.com> | 2015-08-26 07:25:03 +0300 |
|---|---|---|
| committer | Sreerenj Balachandran <sreerenj.balachandran@intel.com> | 2015-08-26 07:25:03 +0300 |
| commit | 11716efdd3cf6a47e78a2f33245854a0ba6df995 (patch) | |
| tree | 1fdb5df2e574ba4a7ece112c8ffa0debfce23abb /gst-libs/gst | |
| parent | 279c49e8f2443376dc1312a1e26b21748c7d8fe6 (diff) | |
| download | gst-vaapi-11716efdd3cf6a47e78a2f33245854a0ba6df995.tar.gz | |
decoder: hevc: Fix the scaling list scan order
The default scan order of scaling lists are up-right-diagonal
as per hevc specification. Use the newly implemented
uprightdiagonal_to_raster conversion codecparser APIs to
get the the scaling_list values in raster order, which is
what the VA intel driver requires.
Diffstat (limited to 'gst-libs/gst')
| -rw-r--r-- | gst-libs/gst/vaapi/gstvaapidecoder_h265.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gst-libs/gst/vaapi/gstvaapidecoder_h265.c b/gst-libs/gst/vaapi/gstvaapidecoder_h265.c index a55f1efb..f8da6651 100644 --- a/gst-libs/gst/vaapi/gstvaapidecoder_h265.c +++ b/gst-libs/gst/vaapi/gstvaapidecoder_h265.c @@ -1148,7 +1148,7 @@ fill_iq_matrix_4x4 (VAIQMatrixBufferHEVC * iq_matrix, g_assert (G_N_ELEMENTS (iq_matrix->ScalingList4x4) == 6); g_assert (G_N_ELEMENTS (iq_matrix->ScalingList4x4[0]) == 16); for (i = 0; i < G_N_ELEMENTS (iq_matrix->ScalingList4x4); i++) { - gst_h265_quant_matrix_4x4_get_raster_from_zigzag (iq_matrix->ScalingList4x4 + gst_h265_quant_matrix_4x4_get_raster_from_uprightdiagonal (iq_matrix->ScalingList4x4 [i], scaling_list->scaling_lists_4x4[i]); } } @@ -1162,7 +1162,7 @@ fill_iq_matrix_8x8 (VAIQMatrixBufferHEVC * iq_matrix, g_assert (G_N_ELEMENTS (iq_matrix->ScalingList8x8) == 6); g_assert (G_N_ELEMENTS (iq_matrix->ScalingList8x8[0]) == 64); for (i = 0; i < G_N_ELEMENTS (iq_matrix->ScalingList8x8); i++) { - gst_h265_quant_matrix_8x8_get_raster_from_zigzag (iq_matrix->ScalingList8x8 + gst_h265_quant_matrix_8x8_get_raster_from_uprightdiagonal (iq_matrix->ScalingList8x8 [i], scaling_list->scaling_lists_8x8[i]); } } @@ -1176,7 +1176,7 @@ fill_iq_matrix_16x16 (VAIQMatrixBufferHEVC * iq_matrix, g_assert (G_N_ELEMENTS (iq_matrix->ScalingList16x16) == 6); g_assert (G_N_ELEMENTS (iq_matrix->ScalingList16x16[0]) == 64); for (i = 0; i < G_N_ELEMENTS (iq_matrix->ScalingList16x16); i++) { - gst_h265_quant_matrix_16x16_get_raster_from_zigzag + gst_h265_quant_matrix_16x16_get_raster_from_uprightdiagonal (iq_matrix->ScalingList16x16[i], scaling_list->scaling_lists_16x16[i]); } } @@ -1190,7 +1190,7 @@ fill_iq_matrix_32x32 (VAIQMatrixBufferHEVC * iq_matrix, g_assert (G_N_ELEMENTS (iq_matrix->ScalingList32x32) == 2); g_assert (G_N_ELEMENTS (iq_matrix->ScalingList32x32[0]) == 64); for (i = 0; i < G_N_ELEMENTS (iq_matrix->ScalingList32x32); i++) { - gst_h265_quant_matrix_32x32_get_raster_from_zigzag + gst_h265_quant_matrix_32x32_get_raster_from_uprightdiagonal (iq_matrix->ScalingList32x32[i], scaling_list->scaling_lists_32x32[i]); } } |