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| author | David Terei <davidterei@gmail.com> | 2011-11-21 16:07:56 -0800 |
|---|---|---|
| committer | David Terei <davidterei@gmail.com> | 2011-11-21 16:07:56 -0800 |
| commit | 0c9427cd3c56f5ae6dc34a5537d52e207939b7ff (patch) | |
| tree | 8655ed27efe0c09ee8ec610148639efc87d0740b | |
| parent | d6c2ffdc03bb7aa57d2576d208ac0b57dd650b47 (diff) | |
| download | haskell-0c9427cd3c56f5ae6dc34a5537d52e207939b7ff.tar.gz | |
Add doc for -msse4.2 flag.
| -rw-r--r-- | docs/users_guide/using.xml | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/docs/users_guide/using.xml b/docs/users_guide/using.xml index 47fec9ae1c..5bd6f11148 100644 --- a/docs/users_guide/using.xml +++ b/docs/users_guide/using.xml @@ -2238,7 +2238,10 @@ f "2" = 2 This gives a substantial performance improvement for floating point, but the resulting compiled code will only run on processors that support SSE2 (Intel Pentium 4 and - later, or AMD Athlon 64 and later). + later, or AMD Athlon 64 and later). The + <link linkend="llvm-code-gen">LLVM backend</link> will also use SSE2 + if your processor supports it but detects this automatically so no + flag is required. </para> <para> SSE2 is unconditionally used on x86-64 platforms. @@ -2246,6 +2249,22 @@ f "2" = 2 </listitem> </varlistentry> + <varlistentry> + <term><option>-msse4.2</option>:</term> + <listitem> + <para> + (x86 only, added in GHC 7.2.1) Use the SSE4.2 instruction set to + implement some floating point and bit operations when using the + <link linkend="native-code-gen">native code generator</link>. The + resulting compiled code will only run on processors that + support SSE4.2 (Intel Core i7 and later). The + <link linkend="llvm-code-gen">LLVM backend</link> will also use + SSE4.2 if your processor supports it but detects this automatically + so no flag is required. + </para> + </listitem> + </varlistentry> + </variablelist> </sect1> |