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authorDai <daig@users.noreply.github.com>2022-10-14 13:07:43 +0200
committerMarge Bot <ben+marge-bot@smart-cactus.org>2022-10-19 10:45:45 -0400
commit5b3a992f5d166007c3c5a22f120ed08e0a27f01a (patch)
tree4da760b794be76a6298acefa62e3be4c61b3794e /compiler/GHC/Stg/Unarise.hs
parent99dc3e3d76daab80a5c5209a3e0c44c9e4664e06 (diff)
downloadhaskell-5b3a992f5d166007c3c5a22f120ed08e0a27f01a.tar.gz
Add VecSlot for unboxed sums of SIMD vectors
This patch adds the missing `VecRep` case to `primRepSlot` function and all the necessary machinery to carry this new `VecSlot` through code generation. This allows programs involving unboxed sums of SIMD vectors to be written and compiled. Fixes #22187
Diffstat (limited to 'compiler/GHC/Stg/Unarise.hs')
-rw-r--r--compiler/GHC/Stg/Unarise.hs2
1 files changed, 2 insertions, 0 deletions
diff --git a/compiler/GHC/Stg/Unarise.hs b/compiler/GHC/Stg/Unarise.hs
index 440b184d44..8dfdeb607c 100644
--- a/compiler/GHC/Stg/Unarise.hs
+++ b/compiler/GHC/Stg/Unarise.hs
@@ -694,6 +694,8 @@ ubxSumRubbishArg WordSlot = StgLitArg (LitNumber LitNumWord 0)
ubxSumRubbishArg Word64Slot = StgLitArg (LitNumber LitNumWord64 0)
ubxSumRubbishArg FloatSlot = StgLitArg (LitFloat 0)
ubxSumRubbishArg DoubleSlot = StgLitArg (LitDouble 0)
+ubxSumRubbishArg (VecSlot n e) = StgLitArg (LitRubbish vec_rep)
+ where vec_rep = primRepToRuntimeRep (VecRep n e)
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