diff options
| author | sewardj <unknown> | 2000-01-26 13:38:02 +0000 |
|---|---|---|
| committer | sewardj <unknown> | 2000-01-26 13:38:02 +0000 |
| commit | 62d7b4e1def45081ae70f80d2e0be1e4ad8611c9 (patch) | |
| tree | 97c45c12e18d717cbd84b15be86f93a3924c66d3 /ghc/compiler | |
| parent | 8eb44058fac597151120057a85b02393d599dd2c (diff) | |
| download | haskell-62d7b4e1def45081ae70f80d2e0be1e4ad8611c9.tar.gz | |
[project @ 2000-01-26 13:38:02 by sewardj]
spillReg, loadReg (x86): always spill fp registers using double-sized
loads/stores, even if they nominally contain only a float value --
otherwise the spill loses the extra guard bits.
Diffstat (limited to 'ghc/compiler')
| -rw-r--r-- | ghc/compiler/nativeGen/RegAllocInfo.lhs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ghc/compiler/nativeGen/RegAllocInfo.lhs b/ghc/compiler/nativeGen/RegAllocInfo.lhs index 66f2ae0626..ac015fe225 100644 --- a/ghc/compiler/nativeGen/RegAllocInfo.lhs +++ b/ghc/compiler/nativeGen/RegAllocInfo.lhs @@ -779,7 +779,7 @@ spillReg dyn (MemoryReg i pk) {-I386: spill above stack pointer leaving 2 words/spill-} ,IF_ARCH_i386 ( if pk == FloatRep || pk == DoubleRep - then GST sz dyn (spRel (16 + 2 * i)) + then GST DF dyn (spRel (16 + 2 * i)) else MOV sz (OpReg dyn) (OpAddr (spRel (16 + 2 * i))) {-SPARC: spill below frame pointer leaving 2 words/spill-} @@ -796,7 +796,7 @@ loadReg (MemoryReg i pk) dyn mkUnitList ( IF_ARCH_alpha( LD sz dyn (spRel i) ,IF_ARCH_i386 ( if pk == FloatRep || pk == DoubleRep - then GLD sz (spRel (16 + 2 * i)) dyn + then GLD DF (spRel (16 + 2 * i)) dyn else MOV sz (OpAddr (spRel (16 + 2 * i))) (OpReg dyn) ,IF_ARCH_sparc( LD sz (fpRel (-2 * i)) dyn ,))) |