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-rw-r--r--compiler/cmm/CmmInfo.hs2
-rw-r--r--compiler/codeGen/CgCallConv.hs2
-rw-r--r--compiler/codeGen/CgHpc.hs2
-rw-r--r--compiler/codeGen/StgCmmHpc.hs2
-rw-r--r--compiler/codeGen/StgCmmLayout.hs2
-rw-r--r--compiler/ghci/ByteCodeGen.lhs2
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs8
-rw-r--r--compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs2
8 files changed, 11 insertions, 11 deletions
diff --git a/compiler/cmm/CmmInfo.hs b/compiler/cmm/CmmInfo.hs
index c608372c64..2549453288 100644
--- a/compiler/cmm/CmmInfo.hs
+++ b/compiler/cmm/CmmInfo.hs
@@ -245,7 +245,7 @@ mkLiveness uniq live =
small_bitmap = case bitmap of
[] -> 0
- [b] -> fromIntegral b
+ [b] -> b
_ -> panic "mkLiveness"
small_liveness =
fromIntegral (length bits) .|. (small_bitmap `shiftL` bITMAP_BITS_SHIFT)
diff --git a/compiler/codeGen/CgCallConv.hs b/compiler/codeGen/CgCallConv.hs
index b8294ea326..f16a9b5e18 100644
--- a/compiler/codeGen/CgCallConv.hs
+++ b/compiler/codeGen/CgCallConv.hs
@@ -150,7 +150,7 @@ mkLiveness name size bits
= let
small_bits = case bits of
[] -> 0
- [b] -> fromIntegral b
+ [b] -> b
_ -> panic "livenessToAddrMode"
in
return (smallLiveness size small_bits)
diff --git a/compiler/codeGen/CgHpc.hs b/compiler/codeGen/CgHpc.hs
index 3d300eda53..d02c949b5e 100644
--- a/compiler/codeGen/CgHpc.hs
+++ b/compiler/codeGen/CgHpc.hs
@@ -29,7 +29,7 @@ cgTickBox :: Module -> Int -> Code
cgTickBox mod n = do
let tick_box = (cmmIndex W64
(CmmLit $ CmmLabel $ mkHpcTicksLabel $ mod)
- (fromIntegral n)
+ n
)
stmtsC [ CmmStore tick_box
(CmmMachOp (MO_Add W64)
diff --git a/compiler/codeGen/StgCmmHpc.hs b/compiler/codeGen/StgCmmHpc.hs
index 8bf1fbfbc3..e39a1013e3 100644
--- a/compiler/codeGen/StgCmmHpc.hs
+++ b/compiler/codeGen/StgCmmHpc.hs
@@ -32,7 +32,7 @@ mkTickBox mod n
where
tick_box = cmmIndex W64
(CmmLit $ CmmLabel $ mkHpcTicksLabel $ mod)
- (fromIntegral n)
+ n
initHpc :: Module -> HpcInfo -> FCode CmmAGraph
-- Emit top-level tables for HPC and return code to initialise
diff --git a/compiler/codeGen/StgCmmLayout.hs b/compiler/codeGen/StgCmmLayout.hs
index 3b69061426..21e55ee074 100644
--- a/compiler/codeGen/StgCmmLayout.hs
+++ b/compiler/codeGen/StgCmmLayout.hs
@@ -400,7 +400,7 @@ mkLiveness name size bits
= let
small_bits = case bits of
[] -> 0
- [b] -> fromIntegral b
+ [b] -> b
_ -> panic "livenessToAddrMode"
in
return (smallLiveness size small_bits)
diff --git a/compiler/ghci/ByteCodeGen.lhs b/compiler/ghci/ByteCodeGen.lhs
index 4358515b08..e0920fc2f1 100644
--- a/compiler/ghci/ByteCodeGen.lhs
+++ b/compiler/ghci/ByteCodeGen.lhs
@@ -298,7 +298,7 @@ schemeER_wrk d p rhs
| Just (tickInfo, (_annot, newRhs)) <- isTickedExp' rhs = do
code <- schemeE d 0 p newRhs
arr <- getBreakArray
- let idOffSets = getVarOffSets (fromIntegral d) p tickInfo
+ let idOffSets = getVarOffSets d p tickInfo
let tickNumber = tickInfo_number tickInfo
let breakInfo = BreakInfo
{ breakInfo_module = tickInfo_module tickInfo
diff --git a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs
index aa6822c091..3db5555bff 100644
--- a/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/PPC/FreeRegs.hs
@@ -32,8 +32,8 @@ noFreeRegs = FreeRegs 0 0
releaseReg :: RealReg -> FreeRegs -> FreeRegs
releaseReg (RealRegSingle r) (FreeRegs g f)
- | r > 31 = FreeRegs g (f .|. (1 `shiftL` (fromIntegral r - 32)))
- | otherwise = FreeRegs (g .|. (1 `shiftL` fromIntegral r)) f
+ | r > 31 = FreeRegs g (f .|. (1 `shiftL` (r - 32)))
+ | otherwise = FreeRegs (g .|. (1 `shiftL` r)) f
releaseReg _ _
= panic "RegAlloc.Linear.PPC.releaseReg: bad reg"
@@ -53,8 +53,8 @@ getFreeRegs cls (FreeRegs g f)
allocateReg :: RealReg -> FreeRegs -> FreeRegs
allocateReg (RealRegSingle r) (FreeRegs g f)
- | r > 31 = FreeRegs g (f .&. complement (1 `shiftL` (fromIntegral r - 32)))
- | otherwise = FreeRegs (g .&. complement (1 `shiftL` fromIntegral r)) f
+ | r > 31 = FreeRegs g (f .&. complement (1 `shiftL` (r - 32)))
+ | otherwise = FreeRegs (g .&. complement (1 `shiftL` r)) f
allocateReg _ _
= panic "RegAlloc.Linear.PPC.allocateReg: bad reg"
diff --git a/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs
index 0a15e5682c..27810ff8c6 100644
--- a/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/X86/FreeRegs.hs
@@ -47,7 +47,7 @@ getFreeRegs cls f = go f 0
allocateReg :: RealReg -> FreeRegs -> FreeRegs
allocateReg (RealRegSingle r) f
- = f .&. complement (1 `shiftL` fromIntegral r)
+ = f .&. complement (1 `shiftL` r)
allocateReg _ _
= panic "RegAlloc.Linear.X86.FreeRegs.allocateReg: no reg"