| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | DDR3: Simplify decoding of the heat spreader byte. This is basically a | Jean Delvare | 2013-04-15 | 1 | -3/+1 |
| * | DDR3: Decode the register revision byte as suggested by Jedec | Jean Delvare | 2013-04-15 | 1 | -1/+13 |
| * | DDR3: Fix --side-by-side when some modules lack manufacturer | Jean Delvare | 2013-04-15 | 1 | -12/+9 |
| * | DDR3: Print rank 1 mapping of unbuffered DIMM. | Jean Delvare | 2013-04-14 | 1 | -0/+3 |
| * | DDR3: Print physical characteristics and registered DIMM information | Jean Delvare | 2013-04-14 | 1 | -17/+28 |
| * | DDR3: Move "mm" in physical dimensions from label to values, for | Jean Delvare | 2013-04-14 | 1 | -15/+15 |
| * | DDR3: Print width of all known module types. | Jean Delvare | 2013-04-14 | 1 | -8/+19 |
| * | DDR3: Decode and print reference card revision. | Jean Delvare | 2013-04-14 | 1 | -4/+6 |
| * | DDR3: Move decoding of the reference card to a dedicated function. | Jean Delvare | 2013-04-14 | 1 | -20/+26 |
| * | DDR3: Print timings at standard speeds. This makes it easier to figure | Jean Delvare | 2013-04-14 | 1 | -0/+19 |
| * | DDR3: Repeat tCK, tAA, tRCD, tRP and tRAS values, so that they show up | Jean Delvare | 2013-04-13 | 1 | -0/+5 |
| * | DDR3: Fix speed and PC3 number of high-speed modules. | Jean Delvare | 2013-04-13 | 1 | -1/+11 |
| * | DDR3: Decode the FTB fields of tCk, tAA, tRCD, tRP and tRC. | Jean Delvare | 2013-04-13 | 1 | -7/+18 |
| * | DDR3: Don't print the medium and fine time bases, they aren't directly | Jean Delvare | 2013-04-13 | 1 | -9/+9 |
| * | DDR3: Round down PC3 numbers to comply with Jedec. | Jean Delvare | 2013-04-13 | 1 | -0/+2 |
| * | DDR3: Round core timings up, not down. | Jean Delvare | 2013-04-13 | 1 | -4/+4 |
| * | DDR3: Use the right nibble from byte 21 as the MSB of tRAS. | Jean Delvare | 2013-04-13 | 1 | -1/+1 |
| * | Decode more DDR3 module types | Jean Delvare | 2013-02-13 | 1 | -1/+4 |
| * | Prevent hang on reserved DDR3 module type | Jean Delvare | 2013-02-13 | 1 | -1/+1 |
| * | Print timings at standard PC speeds. The minimum cycle times for the | Jean Delvare | 2012-12-20 | 1 | -1/+24 |
| * | Fix decoding of SDR SPD revision. The encoding changed with revision | Jean Delvare | 2012-12-20 | 1 | -1/+3 |
| * | Add section headers for SDR modules, to make the output easier to read. | Jean Delvare | 2012-12-20 | 1 | -2/+3 |
| * | Remove duplicate "ns" in SDR timings. | Jean Delvare | 2012-12-20 | 1 | -5/+1 |
| * | Strip former manufacturer name in side-by-side output mode, to avoid | Jean Delvare | 2012-12-20 | 1 | -0/+1 |
| * | If DDR3 manufacturer page count parity is wrong, still print the | Jean Delvare | 2012-12-20 | 1 | -3/+6 |
| * | Add manufacturer names from Jedec document JEP106AJ. | Jean Delvare | 2012-12-20 | 1 | -2/+6 |
| * | Introduce helper function as_ddr(), hopefully this makes the code a | Jean Delvare | 2012-12-20 | 1 | -8/+16 |
| * | ddr2_core_timings is now the exact same function as ddr_core_timings | Jean Delvare | 2012-12-20 | 1 | -13/+5 |
| * | Print timings at standard DDR speeds. The minimum cycle times for the | Jean Delvare | 2012-12-20 | 1 | -12/+34 |
| * | Print timings at standard DDR2 speeds. The minimum cycle times for the | Jean Delvare | 2012-12-20 | 1 | -15/+36 |
| * | decode-dimms: Print DDR2 core timings for all supported CAS values, as | Jean Delvare | 2012-10-25 | 1 | -9/+23 |
| * | decode-dimms: Print only the DDR2 timings which were properly defined. | Jean Delvare | 2012-10-25 | 1 | -21/+43 |
| * | decode-dimms: Print DDR2 equivalent speed of tCK max. | Jean Delvare | 2012-10-25 | 1 | -3/+5 |
| * | decode-dimms: Print DDR core timings for all supported CAS values. | Jean Delvare | 2012-10-25 | 1 | -14/+25 |
| * | decode-dimms: Print extra timing values for DDR memory modules as we do | Jean Delvare | 2012-10-25 | 1 | -1/+46 |
| * | decode-dimms: Default to merging cells in side-by-side output mode. | Jean Delvare | 2012-10-25 | 1 | -0/+9 |
| * | Don't let missing DDR2 SPD revision or PLL relock time break side-by-side out... | Jean Delvare | 2012-10-22 | 1 | -5/+3 |
| * | Print a space before "MHz" to improve readability. | Jean Delvare | 2012-10-22 | 1 | -7/+7 |
| * | Print the number of banks, rows, columns and ranks for DDR modules as | Jean Delvare | 2012-10-21 | 1 | -0/+4 |
| * | Don't let missing DDR module height break side-by-side output. | Jean Delvare | 2012-10-21 | 1 | -6/+4 |
| * | Update vendor list based on Jedec document JEP106AG. Contributed by | Jean Delvare | 2012-09-10 | 1 | -13/+56 |
| * | Move the code to a function, it's cleaner. | Jean Delvare | 2012-09-07 | 1 | -4/+12 |
| * | Optimize the code which computes the column width. | Jean Delvare | 2012-09-07 | 1 | -8/+10 |
| * | In side-by-side merged cells mode, don't make columns larger than they | Jean Delvare | 2012-09-07 | 1 | -3/+18 |
| * | Don't choke when no SPD EEPROM is found while the eeprom or at24 driver is | Jean Delvare | 2012-07-19 | 1 | -5/+6 |
| * | Read EEPROM contents before printing headers. | Jean Delvare | 2012-07-19 | 1 | -14/+14 |
| * | decode-dimms: Use short name in side-by-side output mode also when | Jean Delvare | 2012-04-19 | 1 | -1/+2 |
| * | Decode and print bus width extension of DDR3 memory modules. | Jean Delvare | 2012-04-18 | 1 | -0/+2 |
| * | Decode and print module configuration type (parity, ECC) of DDR2 memory | Jean Delvare | 2012-04-18 | 1 | -7/+15 |
| * | Add support for the at24 kernel driver. | Jean Delvare | 2011-02-16 | 1 | -7/+38 |
