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author | ylavic <ylavic@13f79535-47bb-0310-9956-ffa450edef68> | 2021-10-29 15:07:11 +0000 |
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committer | ylavic <ylavic@13f79535-47bb-0310-9956-ffa450edef68> | 2021-10-29 15:07:11 +0000 |
commit | fffb696f44603367ff596be88e012e7c7fb4c65c (patch) | |
tree | d09e9ac585a19d56547c1b1dc8703a6d2115469b /atomic/unix/builtins64.c | |
parent | ca229155fffd5b16e86a3e54394a86a6045462b0 (diff) | |
download | libapr-fffb696f44603367ff596be88e012e7c7fb4c65c.tar.gz |
Revert r1894618.
git-svn-id: https://svn.apache.org/repos/asf/apr/apr/trunk@1894619 13f79535-47bb-0310-9956-ffa450edef68
Diffstat (limited to 'atomic/unix/builtins64.c')
-rw-r--r-- | atomic/unix/builtins64.c | 38 |
1 files changed, 3 insertions, 35 deletions
diff --git a/atomic/unix/builtins64.c b/atomic/unix/builtins64.c index 0ac950c15..4a4b685c7 100644 --- a/atomic/unix/builtins64.c +++ b/atomic/unix/builtins64.c @@ -20,77 +20,45 @@ APR_DECLARE(apr_uint64_t) apr_atomic_read64(volatile apr_uint64_t *mem) { -#if HAVE__ATOMIC_BUILTINS - return __atomic_load_n(mem, __ATOMIC_SEQ_CST); -#else return *mem; -#endif } APR_DECLARE(void) apr_atomic_set64(volatile apr_uint64_t *mem, apr_uint64_t val) { -#if HAVE__ATOMIC_BUILTINS - __atomic_store_n(mem, val, __ATOMIC_SEQ_CST); -#else *mem = val; -#endif } APR_DECLARE(apr_uint64_t) apr_atomic_add64(volatile apr_uint64_t *mem, apr_uint64_t val) { -#if HAVE__ATOMIC_BUILTINS - return __atomic_fetch_add(mem, val, __ATOMIC_SEQ_CST); -#else return __sync_fetch_and_add(mem, val); -#endif } APR_DECLARE(void) apr_atomic_sub64(volatile apr_uint64_t *mem, apr_uint64_t val) { -#if HAVE__ATOMIC_BUILTINS - __atomic_fetch_sub(mem, val, __ATOMIC_SEQ_CST); -#else __sync_fetch_and_sub(mem, val); -#endif } APR_DECLARE(apr_uint64_t) apr_atomic_inc64(volatile apr_uint64_t *mem) { -#if HAVE__ATOMIC_BUILTINS - return __atomic_fetch_add(mem, 1, __ATOMIC_SEQ_CST); -#else return __sync_fetch_and_add(mem, 1); -#endif } APR_DECLARE(int) apr_atomic_dec64(volatile apr_uint64_t *mem) { -#if HAVE__ATOMIC_BUILTINS - return __atomic_sub_fetch(mem, 1, __ATOMIC_SEQ_CST); -#else return __sync_sub_and_fetch(mem, 1); -#endif } -APR_DECLARE(apr_uint64_t) apr_atomic_cas64(volatile apr_uint64_t *mem, apr_uint64_t val, +APR_DECLARE(apr_uint64_t) apr_atomic_cas64(volatile apr_uint64_t *mem, apr_uint64_t with, apr_uint64_t cmp) { -#if HAVE__ATOMIC_BUILTINS - __atomic_compare_exchange_n(mem, &cmp, val, 0, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); - return cmp; -#else - return __sync_val_compare_and_swap(mem, cmp, val); -#endif + return __sync_val_compare_and_swap(mem, cmp, with); } APR_DECLARE(apr_uint64_t) apr_atomic_xchg64(volatile apr_uint64_t *mem, apr_uint64_t val) { -#if HAVE__ATOMIC_BUILTINS - return __atomic_exchange_n(mem, val, __ATOMIC_SEQ_CST); -#else __sync_synchronize(); + return __sync_lock_test_and_set(mem, val); -#endif } #endif /* USE_ATOMICS_BUILTINS */ |