diff options
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/powerpc.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/powerpc.h b/src/atomic_ops/sysdeps/gcc/powerpc.h index 5bee475..7232117 100644 --- a/src/atomic_ops/sysdeps/gcc/powerpc.h +++ b/src/atomic_ops/sysdeps/gcc/powerpc.h @@ -20,6 +20,22 @@ /* http://www-106.ibm.com/developerworks/eserver/articles/powerpc.html. */ /* There appears to be no implicit ordering between any kind of */ /* independent memory references. */ + +/* TODO: Implement double-wide operations if available. */ + +#if (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) \ + || __clang_major__ > 3 \ + || (__clang_major__ == 3 && __clang_minor__ >= 8)) \ + && !defined(AO_DISABLE_GCC_ATOMICS) + /* Probably, it could be enabled even for earlier gcc/clang versions. */ + + /* TODO: As of clang-3.8.1, it emits lwsync in AO_load_acquire */ + /* (i.e., the code is less efficient than the one given below). */ + +# include "generic.h" + +#else /* AO_DISABLE_GCC_ATOMICS */ + /* Architecture enforces some ordering based on control dependence. */ /* I don't know if that could help. */ /* Data-dependent loads are always ordered. */ @@ -358,4 +374,4 @@ AO_fetch_and_add_full(volatile AO_t *addr, AO_t incr) { # define AO_T_IS_INT #endif -/* TODO: Implement double-wide operations if available. */ +#endif /* AO_DISABLE_GCC_ATOMICS */ |