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author | Tushar Gohad <tushar.gohad@intel.com> | 2015-03-05 16:02:39 -0700 |
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committer | Tushar Gohad <tushar.gohad@intel.com> | 2015-03-05 16:02:39 -0700 |
commit | de94bbad63e6c557c5fdb6d72b52966fea1062c5 (patch) | |
tree | e4067eb9d2cae7cfd4530925a277d3854450be99 /README.md | |
parent | ff7977635e43a2789610d5d1227dcb9aea2f0681 (diff) | |
download | liberasurecode-de94bbad63e6c557c5fdb6d72b52966fea1062c5.tar.gz |
v1.0-rc3v1.0-rc3
Diffstat (limited to 'README.md')
-rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -10,7 +10,7 @@ Highlights * Unified Erasure Coding interface for common storage workloads.
- * Pluggable Erasure Code backends - As of v1.0-rc2, liberasurecode supports the following backends:
+ * Pluggable Erasure Code backends - As of v1.0-rc3, liberasurecode supports the following backends:
- 'Jerasure' - Erasure Coding library that supports Reed-Solomon, Cauchy backends [1]
- 'ISA-L' - Intel Storage Acceleration Library - SIMD accelerated Erasure Coding backends [2]
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