Disable instrumentation on mixed Intel SSE C/assembly implementations

* cipher/Makefile.am: Make 'tiger.o' and 'tiger.lo' depend on Makefile;
Add instrumentation option munging.
* cipher/cipher-gcm-intel-pcmul.c (ALWAYS_INLINE)
(NO_INSTRUMENT_FUNCTION, ASM_FUNC_ATTR, ASM_FUNC_ATTR_INLINE): New.
(reduction, gfmul_pclmul, gfmul_pclmul_aggr4, gfmul_pclmul_aggr8)
(gcm_lsh): Define with 'ASM_FUNC_ATTR_INLINE' instead of 'inline'.
(_gcry_ghash_setup_intel_pclmul, _gcry_ghash_intel_pclmul): Define with
'ASM_FUNC_ATTR'.
* cipher/crc-intel-pcmul.c (ALWAYS_INLINE, NO_INSTRUMENT_FUNCTION)
(ASM_FUNC_ATTR, ASM_FUNC_ATTR_INLINE): New.
(crc32_reflected_bulk, crc32_reflected_less_than_16, crc32_bulk)
(crc32_less_than_16): Define with 'ASM_FUNC_ATTR_INLINE' instead of
'inline'.
(_gcry_crc32_intel_pclmul, _gcry_crc24rfc2440_intel_pclmul): Define
with 'ASM_FUNC_ATTR'.
* cipher/rijndael-aesni.c (NO_INSTRUMENT_FUNCTION, ASM_FUNC_ATTR)
(ASM_FUNC_ATTR_INLINE, ASM_FUNC_ATTR_NOINLINE): New.
(aes_ocb_get_l, do_aesni_prepare_decryption, do_aesni_enc)
(do_aesni_dec, do_aesni_enc_vec4, do_aesni_dec_vec4, do_aesni_enc_vec8)
(do_aesni_dec_vec8, aesni_ocb_checksum): Define with
'ASM_FUNC_ATTR_INLINE' instead of 'inline'.
(do_aesni_ctr, do_aesni_ctr_4, do_aesni_ctr_8): Define wtih
'ASM_FUNC_ATTR_INLINE'.
(aesni_ocb_enc, aesni_ocb_dec): Define with 'ASM_FUNC_ATTR_NOINLINE'
instead of 'NO_INLINE'.
(_gcry_aes_aesni_do_setkey, _gcry_aes_aesni_prepare_decryption)
(_gcry_aes_aesni_encrypt, _gcry_aes_aesni_cfg_enc)
(_gcry_aes_aesni_cbc_enc, _gcry_aes_aesni_ctr_enc)
(_gcry_aes_aesni_decrypt, _gcry_aes_aesni_cfb_dec)
(_gcry_aes_aesni_cbc_dec, _gcry_aes_aesni_ocb_crypt)
(_gcry_aes_aesni_ocb_auth, _gcry_aes_aesni_xts_enc)
(_gcry_aes_aesni_xts_dec, _gcry_aes_aesni_xts_crypt): Define with
'ASM_FUNC_ATTR'.
* cipher/rijndael-ssse3-amd64.c (ALWAYS_INLINE, NO_INSTRUMENT_FUNCTION)
(ASM_FUNC_ATTR, ASM_FUNC_ATTR_INLINE): New.
(aes_ocb_get_l, do_ssse3_prepare_decryption, do_vpaes_ssse3_enc)
(do_vpaes_ssse3_dec): Define with 'ASM_FUNC_ATTR_INLINE' instead of
'inline'.
(_gcry_aes_ssse3_do_setkey, _gcry_aes_ssse3_prepare_decryption)
(_gcry_aes_ssse3_encrypt, _gcry_aes_ssse3_cfb_enc)
(_gcry_aes_ssse3_cbc_enc, _gcry_aes_ssse3_ctr_enc)
(_gcry_aes_ssse3_decrypt, _gcry_aes_ssse3_cfb_dec)
(_gcry_aes_ssse3_cbc_dec, ssse3_ocb_enc, ssse3_ocb_dec)
(_gcry_aes_ssse3_ocb_crypt, _gcry_aes_ssse3_ocb_auth): Define with
'ASM_FUNC_ATTR'.
* cipher/sha1-intel-shaext.c (NO_INSTRUMENT_FUNCTION)
(ASM_FUNC_ATTR): New.
(_gcry_sha1_transform_intel_shaext): Define with 'ASM_FUNC_ATTR'.
* cipher/sha256-intel-shaext.c (NO_INSTRUMENT_FUNCTION)
(ASM_FUNC_ATTR): New.
(_gcry_sha256_transform_intel_shaext): Define with 'ASM_FUNC_ATTR'.
* configure.ac (ENABLE_INSTRUMENTATION_MUNGING): New.
--

This commit disables instrumentation for mixed C/assembly implementations
for i386 and amd64 that make use of XMM registers. These implementations
use cc as thin assembly front-end and do not tolerate instrumentation
function calls inserted by compiler as those functions may clobber the
XMM registers.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>

1 files changed, 17 insertions, 9 deletions

diff --git a/cipher/cipher-gcm-intel-pclmul.c b/cipher/cipher-gcm-intel-pclmul.c
index 8e109ba3..28165c65 100644
--- a/cipher/cipher-gcm-intel-pclmul.c
+++ b/cipher/cipher-gcm-intel-pclmul.c
@@ -42,12 +42,19 @@
 #endif
 
 
+#define ALWAYS_INLINE inline __attribute__((always_inline))
+#define NO_INSTRUMENT_FUNCTION __attribute__((no_instrument_function))
+
+#define ASM_FUNC_ATTR        NO_INSTRUMENT_FUNCTION
+#define ASM_FUNC_ATTR_INLINE ASM_FUNC_ATTR ALWAYS_INLINE
+
+
 /*
  Intel PCLMUL ghash based on white paper:
   "Intel® Carry-Less Multiplication Instruction and its Usage for Computing the
    GCM Mode - Rev 2.01"; Shay Gueron, Michael E. Kounavis.
  */
-static inline void reduction(void)
+static ASM_FUNC_ATTR_INLINE void reduction(void)
 {
   /* input: <xmm1:xmm3> */
 
@@ -76,7 +83,7 @@ static inline void reduction(void)
                 ::: "memory" );
 }
 
-static inline void gfmul_pclmul(void)
+static ASM_FUNC_ATTR_INLINE void gfmul_pclmul(void)
 {
   /* Input: XMM0 and XMM1, Output: XMM1. Input XMM0 stays unmodified.
      Input must be converted to little-endian.
@@ -107,9 +114,9 @@ static inline void gfmul_pclmul(void)
   reduction();
 }
 
-static inline void gfmul_pclmul_aggr4(const void *buf, const void *h_1,
-                                      const void *h_table,
-                                      const unsigned char *be_mask)
+static ASM_FUNC_ATTR_INLINE void
+gfmul_pclmul_aggr4(const void *buf, const void *h_1, const void *h_table,
+		   const unsigned char *be_mask)
 {
   /* Input:
       Hash: XMM1
@@ -208,7 +215,8 @@ static inline void gfmul_pclmul_aggr4(const void *buf, const void *h_1,
 }
 
 #ifdef __x86_64__
-static inline void gfmul_pclmul_aggr8(const void *buf, const void *h_table)
+static ASM_FUNC_ATTR_INLINE void
+gfmul_pclmul_aggr8(const void *buf, const void *h_table)
 {
   /* Input:
       H¹: XMM0
@@ -372,7 +380,7 @@ static inline void gfmul_pclmul_aggr8(const void *buf, const void *h_table)
 }
 #endif
 
-static inline void gcm_lsh(void *h, unsigned int hoffs)
+static ASM_FUNC_ATTR_INLINE void gcm_lsh(void *h, unsigned int hoffs)
 {
   static const u64 pconst[2] __attribute__ ((aligned (16))) =
     { U64_C(0x0000000000000001), U64_C(0xc200000000000000) };
@@ -394,7 +402,7 @@ static inline void gcm_lsh(void *h, unsigned int hoffs)
                 : "memory" );
 }
 
-void
+void ASM_FUNC_ATTR
 _gcry_ghash_setup_intel_pclmul (gcry_cipher_hd_t c)
 {
   static const unsigned char be_mask[16] __attribute__ ((aligned (16))) =
@@ -548,7 +556,7 @@ _gcry_ghash_setup_intel_pclmul (gcry_cipher_hd_t c)
 }
 
 
-unsigned int
+unsigned int ASM_FUNC_ATTR
 _gcry_ghash_intel_pclmul (gcry_cipher_hd_t c, byte *result, const byte *buf,
                           size_t nblocks)
 {