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author | Jussi Kivilinna <jussi.kivilinna@mbnet.fi> | 2012-11-16 10:44:49 +0200 |
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committer | Werner Koch <wk@gnupg.org> | 2012-11-21 11:51:45 +0100 |
commit | 9e1552517f68459a165ddebbba85e7cf37ff4f0c (patch) | |
tree | df9b0560efcd19ba27f07240cbd6cda7ebc0f6f1 /src/hwfeatures.c | |
parent | 19b9efd1f47a5de9c450ce8212dfa3174a029c7a (diff) | |
download | libgcrypt-9e1552517f68459a165ddebbba85e7cf37ff4f0c.tar.gz |
Fix cpuid vendor-id check for i386 and x86-64
* src/hwfeatures.c (detect_x86_64_gnuc, detect_ia32_gnuc): Allow
Intel features be detect from CPU by other vendors too.
--
detect_x86_64_gnuc() and detect_ia32_gnuc() incorrectly exclude Intel
features on all other vendor CPUs. What we want here, is to detect if
CPU from any vendor support said Intel feature (in this case AES-NI).
[v2]
- Add GNU style changelog
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Diffstat (limited to 'src/hwfeatures.c')
-rw-r--r-- | src/hwfeatures.c | 59 |
1 files changed, 32 insertions, 27 deletions
diff --git a/src/hwfeatures.c b/src/hwfeatures.c index 456c07a3..606f3e7c 100644 --- a/src/hwfeatures.c +++ b/src/hwfeatures.c @@ -112,24 +112,26 @@ detect_x86_64_gnuc (void) else if (!strcmp (vendor_id, "GenuineIntel")) { /* This is an Intel CPU. */ - asm volatile - ("movl $1, %%eax\n\t" /* Get CPU info and feature flags. */ - "cpuid\n" - "testl $0x02000000, %%ecx\n\t" /* Test bit 25. */ - "jz .Lno_aes%=\n\t" /* No AES support. */ - "orl $256, %0\n" /* Set our HWF_INTEL_AES bit. */ - - ".Lno_aes%=:\n" - : "+r" (hw_features) - : - : "%eax", "%ebx", "%ecx", "%edx", "cc" - ); } else if (!strcmp (vendor_id, "AuthenticAMD")) { /* This is an AMD CPU. */ - } + + /* Detect Intel features, that might be supported also by other vendors + * also. */ + asm volatile + ("movl $1, %%eax\n\t" /* Get CPU info and feature flags. */ + "cpuid\n" + "testl $0x02000000, %%ecx\n\t" /* Test bit 25. */ + "jz .Lno_aes%=\n\t" /* No AES support. */ + "orl $256, %0\n" /* Set our HWF_INTEL_AES bit. */ + + ".Lno_aes%=:\n" + : "+r" (hw_features) + : + : "%eax", "%ebx", "%ecx", "%edx", "cc" + ); } #endif /* __x86_64__ && __GNUC__ */ @@ -237,26 +239,29 @@ detect_ia32_gnuc (void) else if (!strcmp (vendor_id, "GenuineIntel")) { /* This is an Intel CPU. */ - asm volatile - ("pushl %%ebx\n\t" /* Save GOT register. */ - "movl $1, %%eax\n\t" /* Get CPU info and feature flags. */ - "cpuid\n" - "popl %%ebx\n\t" /* Restore GOT register. */ - "testl $0x02000000, %%ecx\n\t" /* Test bit 25. */ - "jz .Lno_aes%=\n\t" /* No AES support. */ - "orl $256, %0\n" /* Set our HWF_INTEL_AES bit. */ - - ".Lno_aes%=:\n" - : "+r" (hw_features) - : - : "%eax", "%ecx", "%edx", "cc" - ); } else if (!strcmp (vendor_id, "AuthenticAMD")) { /* This is an AMD CPU. */ } + + /* Detect Intel features, that might be supported also by other vendors + * also. */ + asm volatile + ("pushl %%ebx\n\t" /* Save GOT register. */ + "movl $1, %%eax\n\t" /* Get CPU info and feature flags. */ + "cpuid\n" + "popl %%ebx\n\t" /* Restore GOT register. */ + "testl $0x02000000, %%ecx\n\t" /* Test bit 25. */ + "jz .Lno_aes%=\n\t" /* No AES support. */ + "orl $256, %0\n" /* Set our HWF_INTEL_AES bit. */ + + ".Lno_aes%=:\n" + : "+r" (hw_features) + : + : "%eax", "%ecx", "%edx", "cc" + ); } #endif /* __i386__ && SIZEOF_UNSIGNED_LONG == 4 && __GNUC__ */ |