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authorIan Romanick <idr@umwelt.(none)>2006-07-06 17:18:14 -0700
committerIan Romanick <idr@umwelt.(none)>2006-07-06 17:18:14 -0700
commit2ba1a0e42928f82e678987c84598e1b9d8ba1ef9 (patch)
treec77778bba5db137c07e77caa1ea89a62793157b7 /include
parentc0ff6e6141ee6ebb1f628931ae62f0fa8ef87061 (diff)
downloadlibpciaccess-2ba1a0e42928f82e678987c84598e1b9d8ba1ef9.tar.gz
Files missed (for reasons I still don't understand) on the previous
commit. REALLY add support for querying bridge information. Bump to version 0.5.0.
Diffstat (limited to 'include')
-rw-r--r--include/pciaccess.h60
1 files changed, 60 insertions, 0 deletions
diff --git a/include/pciaccess.h b/include/pciaccess.h
index 97a19a7..c9f46b6 100644
--- a/include/pciaccess.h
+++ b/include/pciaccess.h
@@ -51,6 +51,12 @@ int pci_device_probe( struct pci_device * dev );
const struct pci_agp_info * pci_device_get_agp_info( struct pci_device * dev );
+const struct pci_bridge_info * pci_device_get_bridge_info(
+ struct pci_device * dev );
+
+const struct pci_pcmcia_bridge_info * pci_device_get_pcmcia_bridge_info(
+ struct pci_device * dev );
+
int pci_system_init( void );
void pci_system_cleanup( void );
@@ -318,4 +324,58 @@ struct pci_agp_info {
uint8_t max_requests;
};
+/**
+ * Description of a PCI-to-PCI bridge device.
+ *
+ * \sa pci_device_get_bridge_info
+ */
+struct pci_bridge_info {
+ uint8_t primary_bus;
+ uint8_t secondary_bus;
+ uint8_t subordinate_bus;
+ uint8_t secondary_latency_timer;
+
+ uint8_t io_type;
+ uint8_t mem_type;
+ uint8_t prefetch_mem_type;
+
+ uint16_t secondary_status;
+ uint16_t bridge_control;
+
+ uint32_t io_base;
+ uint32_t io_limit;
+
+ uint32_t mem_base;
+ uint32_t mem_limit;
+
+ uint64_t prefetch_mem_base;
+ uint64_t prefetch_mem_limit;
+};
+
+/**
+ * Description of a PCI-to-PCMCIA bridge device.
+ *
+ * \sa pci_device_get_pcmcia_bridge_info
+ */
+struct pci_pcmcia_bridge_info {
+ uint8_t primary_bus;
+ uint8_t card_bus;
+ uint8_t subordinate_bus;
+ uint8_t cardbus_latency_timer;
+
+ uint16_t secondary_status;
+ uint16_t bridge_control;
+
+ struct {
+ uint32_t base;
+ uint32_t limit;
+ } io[2];
+
+ struct {
+ uint32_t base;
+ uint32_t limit;
+ } mem[2];
+
+};
+
#endif /* PCIACCESS_H */