arch: Add SuperH 32-bit support

Initial support for seccomp for SuperH in Linux was added in 2.6.27-rc2,
support for SECCOMP_FILTER was added for Linux 5.9. This adds support
for SuperH in libseccomp, both for little-endian and big-endian mode.

Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Acked-by: Tom Hromatka <tom.hromatka@oracle.com>
Signed-off-by: Paul Moore <paul@paul-moore.com>

7 files changed, 19 insertions, 4 deletions

diff --git a/tests/16-sim-arch_basic.c b/tests/16-sim-arch_basic.c
index 0b141e1..4fcbb5c 100644
--- a/tests/16-sim-arch_basic.c
+++ b/tests/16-sim-arch_basic.c
@@ -95,6 +95,9 @@ int main(int argc, char *argv[])
 	rc = seccomp_arch_add(ctx, SCMP_ARCH_RISCV64);
 	if (rc != 0)
 		goto out;
+	rc = seccomp_arch_add(ctx, SCMP_ARCH_SH);
+	if (rc != 0)
+		goto out;
 
 	rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1,
 			      SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO));
diff --git a/tests/16-sim-arch_basic.py b/tests/16-sim-arch_basic.py
index 846553f..f22c985 100755
--- a/tests/16-sim-arch_basic.py
+++ b/tests/16-sim-arch_basic.py
@@ -45,6 +45,7 @@ def test(args):
     f.add_arch(Arch("mipsel64n32"))
     f.add_arch(Arch("ppc64le"))
     f.add_arch(Arch("riscv64"))
+    f.add_arch(Arch("sh"))
     f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno()))
     f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno()))
     f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno()))
diff --git a/tests/23-sim-arch_all_le_basic.c b/tests/23-sim-arch_all_le_basic.c
index 32739e5..08f030c 100644
--- a/tests/23-sim-arch_all_le_basic.c
+++ b/tests/23-sim-arch_all_le_basic.c
@@ -74,6 +74,9 @@ int main(int argc, char *argv[])
 	rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("riscv64"));
 	if (rc != 0)
 		goto out;
+	rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("sh"));
+	if (rc != 0)
+		goto out;
 
 	rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1,
 			      SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO));
diff --git a/tests/23-sim-arch_all_le_basic.py b/tests/23-sim-arch_all_le_basic.py
index 33eedb1..12bb243 100755
--- a/tests/23-sim-arch_all_le_basic.py
+++ b/tests/23-sim-arch_all_le_basic.py
@@ -41,6 +41,7 @@ def test(args):
     f.add_arch(Arch("mipsel64n32"))
     f.add_arch(Arch("ppc64le"))
     f.add_arch(Arch("riscv64"))
+    f.add_arch(Arch("sh"))
     f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno()))
     f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno()))
     f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno()))
diff --git a/tests/26-sim-arch_all_be_basic.c b/tests/26-sim-arch_all_be_basic.c
index d31ce12..7db48ea 100644
--- a/tests/26-sim-arch_all_be_basic.c
+++ b/tests/26-sim-arch_all_be_basic.c
@@ -70,6 +70,9 @@ int main(int argc, char *argv[])
 	rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("s390x"));
 	if (rc != 0)
 		goto out;
+	rc = seccomp_arch_add(ctx, seccomp_arch_resolve_name("sheb"));
+	if (rc != 0)
+		goto out;
 
 	rc = seccomp_rule_add(ctx, SCMP_ACT_ALLOW, SCMP_SYS(read), 1,
 			      SCMP_A0(SCMP_CMP_EQ, STDIN_FILENO));
diff --git a/tests/26-sim-arch_all_be_basic.py b/tests/26-sim-arch_all_be_basic.py
index 3a177b4..b0e5f5a 100755
--- a/tests/26-sim-arch_all_be_basic.py
+++ b/tests/26-sim-arch_all_be_basic.py
@@ -39,6 +39,7 @@ def test(args):
     f.add_arch(Arch("ppc64"))
     f.add_arch(Arch("s390"))
     f.add_arch(Arch("s390x"))
+    f.add_arch(Arch("sheb"))
     f.add_rule(ALLOW, "read", Arg(0, EQ, sys.stdin.fileno()))
     f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stdout.fileno()))
     f.add_rule(ALLOW, "write", Arg(0, EQ, sys.stderr.fileno()))
diff --git a/tests/regression b/tests/regression
index 25043af..53dab75 100755
--- a/tests/regression
+++ b/tests/regression
@@ -26,12 +26,14 @@ GLBL_ARCH_LE_SUPPORT=" \
 	arm aarch64 \
 	mipsel mipsel64 mipsel64n32 \
 	ppc64le \
-	riscv64"
+	riscv64 \
+	sh"
 GLBL_ARCH_BE_SUPPORT=" \
 	mips mips64 mips64n32 \
 	parisc parisc64 \
 	ppc ppc64 \
-	s390 s390x"
+	s390 s390x \
+	sheb"
 
 GLBL_ARCH_32B_SUPPORT=" \
 	x86 x32 \
@@ -39,7 +41,8 @@ GLBL_ARCH_32B_SUPPORT=" \
 	mips mipsel mips64n32 mipsel64n32 \
 	parisc \
 	ppc \
-	s390"
+	s390 \
+	sheb sh"
 
 GLBL_ARCH_64B_SUPPORT=" \
 	x86_64 \
@@ -782,7 +785,7 @@ function run_test_live() {
 
 	# setup the arch specific return values
 	case "$arch" in
-	x86|x86_64|x32|arm|aarch64|parisc|parisc64|ppc|ppc64|ppc64le|ppc|s390|s390x|riscv64)
+	x86|x86_64|x32|arm|aarch64|parisc|parisc64|ppc|ppc64|ppc64le|ppc|s390|s390x|riscv64|sh|sheb)
 		rc_kill_process=159
 		rc_kill=159
 		rc_allow=160