summaryrefslogtreecommitdiff
path: root/tests
ModeNameSize
-rw-r--r--.gitignore559logplain
-rw-r--r--01-sim-allow.c1156logplain
-rwxr-xr-x01-sim-allow.py1044logplain
-rw-r--r--01-sim-allow.tests367logplain
-rw-r--r--02-sim-basic.c1658logplain
-rwxr-xr-x02-sim-basic.py1209logplain
-rw-r--r--02-sim-basic.tests796logplain
-rw-r--r--03-sim-basic_chains.c1793logplain
-rwxr-xr-x03-sim-basic_chains.py1347logplain
-rw-r--r--03-sim-basic_chains.tests1005logplain
-rw-r--r--04-sim-multilevel_chains.c2235logplain
-rwxr-xr-x04-sim-multilevel_chains.py1762logplain
-rw-r--r--04-sim-multilevel_chains.tests1891logplain
-rw-r--r--05-sim-long_jumps.c1903logplain
-rwxr-xr-x05-sim-long_jumps.py1516logplain
-rw-r--r--05-sim-long_jumps.tests1273logplain
-rw-r--r--06-sim-actions.c1592logplain
-rwxr-xr-x06-sim-actions.py1196logplain
-rw-r--r--06-sim-actions.tests673logplain
-rw-r--r--07-sim-db_bug_looping.c1672logplain
-rwxr-xr-x07-sim-db_bug_looping.py1338logplain
-rw-r--r--07-sim-db_bug_looping.tests517logplain
-rw-r--r--08-sim-subtree_checks.c4857logplain
-rwxr-xr-x08-sim-subtree_checks.py3898logplain
-rw-r--r--08-sim-subtree_checks.tests1709logplain
-rw-r--r--09-sim-syscall_priority_pre.c1813logplain
-rwxr-xr-x09-sim-syscall_priority_pre.py1369logplain
-rw-r--r--09-sim-syscall_priority_pre.tests704logplain
-rw-r--r--10-sim-syscall_priority_post.c1813logplain
-rwxr-xr-x10-sim-syscall_priority_post.py1369logplain
-rw-r--r--10-sim-syscall_priority_post.tests712logplain
-rw-r--r--11-basic-basic_errors.c4095logplain
-rwxr-xr-x11-basic-basic_errors.py2137logplain
-rw-r--r--11-basic-basic_errors.tests185logplain
-rw-r--r--12-sim-basic_masked_ops.c2234logplain
-rwxr-xr-x12-sim-basic_masked_ops.py1936logplain
-rw-r--r--12-sim-basic_masked_ops.tests1617logplain
-rw-r--r--13-basic-attrs.c1759logplain
-rwxr-xr-x13-basic-attrs.py1440logplain
-rw-r--r--13-basic-attrs.tests178logplain
-rw-r--r--14-sim-reset.c1419logplain
-rwxr-xr-x14-sim-reset.py1118logplain
-rw-r--r--14-sim-reset.tests755logplain
-rw-r--r--15-basic-resolver.c1773logplain
-rwxr-xr-x15-basic-resolver.py1580logplain
-rw-r--r--15-basic-resolver.tests193logplain
-rw-r--r--16-sim-arch_basic.c2459logplain
-rwxr-xr-x16-sim-arch_basic.py1625logplain
-rw-r--r--16-sim-arch_basic.tests1014logplain
-rw-r--r--17-sim-arch_merge.c2751logplain
-rwxr-xr-x17-sim-arch_merge.py1646logplain
-rw-r--r--17-sim-arch_merge.tests858logplain
-rw-r--r--18-sim-basic_whitelist.c1789logplain
-rwxr-xr-x18-sim-basic_whitelist.py1343logplain
-rw-r--r--18-sim-basic_whitelist.tests1063logplain
-rw-r--r--19-sim-missing_syscalls.c1574logplain
-rwxr-xr-x19-sim-missing_syscalls.py1270logplain
-rw-r--r--19-sim-missing_syscalls.tests416logplain
-rw-r--r--20-live-basic_die.c1526logplain
-rwxr-xr-x20-live-basic_die.py1273logplain
-rw-r--r--20-live-basic_die.tests247logplain
-rw-r--r--21-live-basic_allow.c1785logplain
-rwxr-xr-x21-live-basic_allow.py1695logplain
-rw-r--r--21-live-basic_allow.tests203logplain
-rw-r--r--22-sim-basic_chains_array.c1916logplain
-rwxr-xr-x22-sim-basic_chains_array.py1493logplain
-rw-r--r--22-sim-basic_chains_array.tests1057logplain
-rw-r--r--23-sim-arch_all_basic.c2257logplain
-rwxr-xr-x23-sim-arch_all_basic.py1564logplain
-rw-r--r--23-sim-arch_all_basic.tests787logplain
-rw-r--r--24-live-arg_allow.c2067logplain
-rwxr-xr-x24-live-arg_allow.py1661logplain
-rw-r--r--24-live-arg_allow.tests201logplain
-rw-r--r--25-sim-multilevel_chains_adv.c1495logplain
-rwxr-xr-x25-sim-multilevel_chains_adv.py1308logplain
-rw-r--r--25-sim-multilevel_chains_adv.tests1128logplain
-rw-r--r--Makefile1982logplain
-rwxr-xr-xregression23949logplain
-rwxr-xr-xtestdiff2431logplain
-rwxr-xr-xtestgen4356logplain
-rw-r--r--util.c4754logplain
-rw-r--r--util.h1114logplain
-rw-r--r--util.py3046logplain