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Diffstat (limited to 'src/gen7_mfc.c')
-rw-r--r--src/gen7_mfc.c245
1 files changed, 126 insertions, 119 deletions
diff --git a/src/gen7_mfc.c b/src/gen7_mfc.c
index 8572b89f..78b10965 100644
--- a/src/gen7_mfc.c
+++ b/src/gen7_mfc.c
@@ -41,12 +41,16 @@
#include "gen6_mfc.h"
#include "gen6_vme.h"
+#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
+#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index)
+#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
+
extern void
gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx,
struct intel_encoder_context *encoder_context);
extern void
gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx,
- struct intel_encoder_context *encoder_context);
+ struct intel_encoder_context *encoder_context);
extern void
gen6_mfc_init(VADriverContextP ctx,
struct encode_state *encode_state,
@@ -208,13 +212,13 @@ gen7_mfc_avc_img_state(VADriverContextP ctx, struct encode_state *encode_state,
BEGIN_BCS_BATCH(batch, 16);
OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2));
- /*DW1 frame size */
+ /*DW1 frame size */
OUT_BCS_BATCH(batch,
- ((width_in_mbs * height_in_mbs) & 0xFFFF));
+ ((width_in_mbs * height_in_mbs - 1) & 0xFFFF));
OUT_BCS_BATCH(batch,
((height_in_mbs - 1) << 16) |
((width_in_mbs - 1) << 0));
- /*DW3 Qp setting */
+ /*DW3 Qp setting */
OUT_BCS_BATCH(batch,
(0 << 24) | /* Second Chroma QP Offset */
(0 << 16) | /* Chroma QP Offset */
@@ -240,20 +244,20 @@ gen7_mfc_avc_img_state(VADriverContextP ctx, struct encode_state *encode_state,
(1 << 2) | /* Frame MB only flag */
(0 << 1) | /* MBAFF mode is in active */
(0 << 0)); /* Field picture flag */
- /*DW5 trequllis quantization */
+ /*DW5 trequllis quantization */
OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */
OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */
(0xBB8 << 16) | /* InterMbMaxSz */
(0xEE8) ); /* IntraMbMaxSz */
- /* DW7 */
+ /* DW7 */
OUT_BCS_BATCH(batch, 0); /* Reserved */
OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */
OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */
- /* DW10 frame bit setting */
+ /* DW10 frame bit setting */
OUT_BCS_BATCH(batch, 0x8C000000);
OUT_BCS_BATCH(batch, 0x00010000);
OUT_BCS_BATCH(batch, 0);
- /* DW13 Ref setting */
+ /* DW13 Ref setting */
OUT_BCS_BATCH(batch, 0x02010100);
OUT_BCS_BATCH(batch, 0);
OUT_BCS_BATCH(batch, 0);
@@ -373,17 +377,19 @@ va_to_gen7_mpeg2_picture_type[3] = {
static void
gen7_mfc_mpeg2_pic_state(VADriverContextP ctx,
- struct intel_encoder_context *encoder_context,
- struct encode_state *encode_state)
+ struct intel_encoder_context *encoder_context,
+ struct encode_state *encode_state)
{
struct intel_batchbuffer *batch = encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
VAEncPictureParameterBufferMPEG2 *pic_param;
int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
int height_in_mbs = (mfc_context->surface_state.height + 15) / 16;
+ VAEncSliceParameterBufferMPEG2 *slice_param = NULL;
assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer);
pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
+ slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
BEGIN_BCS_BATCH(batch, 13);
OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2));
@@ -408,7 +414,12 @@ gen7_mfc_mpeg2_pic_state(VADriverContextP ctx,
1 << 31 | /* slice concealment */
(height_in_mbs - 1) << 16 |
(width_in_mbs - 1));
- OUT_BCS_BATCH(batch, 0);
+
+ if (slice_param && slice_param->quantiser_scale_code >= 14)
+ OUT_BCS_BATCH(batch, (3 << 1) | (1 << 4) | (5 << 8) | (1 << 12));
+ else
+ OUT_BCS_BATCH(batch, 0);
+
OUT_BCS_BATCH(batch, 0);
OUT_BCS_BATCH(batch,
0xFFF << 16 | /* InterMBMaxSize */
@@ -427,7 +438,7 @@ static void
gen7_mfc_mpeg2_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
{
unsigned char intra_qm[64] = {
- 8, 16, 19, 22, 26, 27, 29, 34,
+ 8, 16, 19, 22, 26, 27, 29, 34,
16, 16, 22, 24, 27, 29, 34, 37,
19, 22, 26, 27, 29, 34, 34, 38,
22, 22, 26, 27, 29, 34, 37, 40,
@@ -456,14 +467,14 @@ static void
gen7_mfc_mpeg2_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
{
unsigned short intra_fqm[64] = {
- 65536/0x8, 65536/0x10, 65536/0x13, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b,
- 65536/0x10, 65536/0x10, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1b, 65536/0x1b, 65536/0x1d,
- 65536/0x13, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, 65536/0x1d, 65536/0x1d, 65536/0x23,
- 65536/0x16, 65536/0x18, 65536/0x1b, 65536/0x1b, 65536/0x13, 65536/0x20, 65536/0x22, 65536/0x26,
- 65536/0x1a, 65536/0x1b, 65536/0x13, 65536/0x13, 65536/0x20, 65536/0x23, 65536/0x26, 65536/0x2e,
- 65536/0x1b, 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x23, 65536/0x28, 65536/0x2e, 65536/0x38,
- 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x25, 65536/0x28, 65536/0x30, 65536/0x38, 65536/0x45,
- 65536/0x22, 65536/0x25, 65536/0x26, 65536/0x28, 65536/0x30, 65536/0x3a, 65536/0x45, 65536/0x53,
+ 65536/0x8, 65536/0x10, 65536/0x13, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b,
+ 65536/0x10, 65536/0x10, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1b, 65536/0x1b, 65536/0x1d,
+ 65536/0x13, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, 65536/0x1d, 65536/0x1d, 65536/0x23,
+ 65536/0x16, 65536/0x18, 65536/0x1b, 65536/0x1b, 65536/0x13, 65536/0x20, 65536/0x22, 65536/0x26,
+ 65536/0x1a, 65536/0x1b, 65536/0x13, 65536/0x13, 65536/0x20, 65536/0x23, 65536/0x26, 65536/0x2e,
+ 65536/0x1b, 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x23, 65536/0x28, 65536/0x2e, 65536/0x38,
+ 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x25, 65536/0x28, 65536/0x30, 65536/0x38, 65536/0x45,
+ 65536/0x22, 65536/0x25, 65536/0x26, 65536/0x28, 65536/0x30, 65536/0x3a, 65536/0x45, 65536/0x53,
};
unsigned short non_intra_fqm[64] = {
@@ -483,14 +494,14 @@ gen7_mfc_mpeg2_fqm_state(VADriverContextP ctx, struct intel_encoder_context *enc
static void
gen7_mfc_mpeg2_slicegroup_state(VADriverContextP ctx,
- struct intel_encoder_context *encoder_context,
- int x, int y,
- int next_x, int next_y,
- int is_fisrt_slice_group,
- int is_last_slice_group,
- int intra_slice,
- int qp,
- struct intel_batchbuffer *batch)
+ struct intel_encoder_context *encoder_context,
+ int x, int y,
+ int next_x, int next_y,
+ int is_fisrt_slice_group,
+ int is_last_slice_group,
+ int intra_slice,
+ int qp,
+ struct intel_batchbuffer *batch)
{
struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
@@ -530,18 +541,18 @@ gen7_mfc_mpeg2_slicegroup_state(VADriverContextP ctx,
static int
gen7_mfc_mpeg2_pak_object_intra(VADriverContextP ctx,
- struct intel_encoder_context *encoder_context,
- int x, int y,
- int first_mb_in_slice,
- int last_mb_in_slice,
- int first_mb_in_slice_group,
- int last_mb_in_slice_group,
- int mb_type,
- int qp_scale_code,
- int coded_block_pattern,
- unsigned char target_size_in_word,
- unsigned char max_size_in_word,
- struct intel_batchbuffer *batch)
+ struct intel_encoder_context *encoder_context,
+ int x, int y,
+ int first_mb_in_slice,
+ int last_mb_in_slice,
+ int first_mb_in_slice_group,
+ int last_mb_in_slice_group,
+ int mb_type,
+ int qp_scale_code,
+ int coded_block_pattern,
+ unsigned char target_size_in_word,
+ unsigned char max_size_in_word,
+ struct intel_batchbuffer *batch)
{
int len_in_dwords = 9;
@@ -627,19 +638,19 @@ mpeg2_motion_vector(int mv, int pos, int display_max, int f_code)
static int
gen7_mfc_mpeg2_pak_object_inter(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context,
- unsigned int *msg,
- int width_in_mbs, int height_in_mbs,
- int x, int y,
- int first_mb_in_slice,
- int last_mb_in_slice,
- int first_mb_in_slice_group,
- int last_mb_in_slice_group,
- int qp_scale_code,
- unsigned char target_size_in_word,
- unsigned char max_size_in_word,
- struct intel_batchbuffer *batch)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context,
+ unsigned int *msg,
+ int width_in_mbs, int height_in_mbs,
+ int x, int y,
+ int first_mb_in_slice,
+ int last_mb_in_slice,
+ int first_mb_in_slice_group,
+ int last_mb_in_slice_group,
+ int qp_scale_code,
+ unsigned char target_size_in_word,
+ unsigned char max_size_in_word,
+ struct intel_batchbuffer *batch)
{
VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
int len_in_dwords = 9;
@@ -697,9 +708,9 @@ gen7_mfc_mpeg2_pak_object_inter(VADriverContextP ctx,
static void
gen7_mfc_mpeg2_pipeline_header_programing(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context,
- struct intel_batchbuffer *slice_batch)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context,
+ struct intel_batchbuffer *slice_batch)
{
struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_SPS);
@@ -751,11 +762,11 @@ gen7_mfc_mpeg2_pipeline_header_programing(VADriverContextP ctx,
static void
gen7_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context,
- int slice_index,
- VAEncSliceParameterBufferMPEG2 *next_slice_group_param,
- struct intel_batchbuffer *slice_batch)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context,
+ int slice_index,
+ VAEncSliceParameterBufferMPEG2 *next_slice_group_param,
+ struct intel_batchbuffer *slice_batch)
{
struct gen6_vme_context *vme_context = encoder_context->vme_context;
struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
@@ -787,16 +798,16 @@ gen7_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx,
}
gen7_mfc_mpeg2_slicegroup_state(ctx,
- encoder_context,
- h_start_pos,
- v_start_pos,
- h_next_start_pos,
- v_next_start_pos,
- slice_index == 0,
- next_slice_group_param == NULL,
- slice_param->is_intra_slice,
- slice_param->quantiser_scale_code,
- slice_batch);
+ encoder_context,
+ h_start_pos,
+ v_start_pos,
+ h_next_start_pos,
+ v_next_start_pos,
+ slice_index == 0,
+ next_slice_group_param == NULL,
+ slice_param->is_intra_slice,
+ slice_param->quantiser_scale_code,
+ slice_batch);
if (slice_index == 0)
gen7_mfc_mpeg2_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -826,36 +837,36 @@ gen7_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx,
if (slice_param->is_intra_slice) {
gen7_mfc_mpeg2_pak_object_intra(ctx,
- encoder_context,
- h_pos, v_pos,
- first_mb_in_slice,
- last_mb_in_slice,
- first_mb_in_slice_group,
- last_mb_in_slice_group,
- 0x1a,
- slice_param->quantiser_scale_code,
- 0x3f,
- 0,
- 0xff,
- slice_batch);
+ encoder_context,
+ h_pos, v_pos,
+ first_mb_in_slice,
+ last_mb_in_slice,
+ first_mb_in_slice_group,
+ last_mb_in_slice_group,
+ 0x1a,
+ slice_param->quantiser_scale_code,
+ 0x3f,
+ 0,
+ 0xff,
+ slice_batch);
} else {
msg = (unsigned int *)(msg_ptr + (slice_param->macroblock_address + j) * vme_context->vme_output.size_block);
if(msg[32] & INTRA_MB_FLAG_MASK) {
- gen7_mfc_mpeg2_pak_object_intra(ctx,
- encoder_context,
- h_pos, v_pos,
- first_mb_in_slice,
- last_mb_in_slice,
- first_mb_in_slice_group,
- last_mb_in_slice_group,
- 0x1a,
- slice_param->quantiser_scale_code,
- 0x3f,
- 0,
- 0xff,
- slice_batch);
- } else {
+ gen7_mfc_mpeg2_pak_object_intra(ctx,
+ encoder_context,
+ h_pos, v_pos,
+ first_mb_in_slice,
+ last_mb_in_slice,
+ first_mb_in_slice_group,
+ last_mb_in_slice_group,
+ 0x1a,
+ slice_param->quantiser_scale_code,
+ 0x3f,
+ 0,
+ 0xff,
+ slice_batch);
+ } else {
gen7_mfc_mpeg2_pak_object_inter(ctx,
encode_state,
@@ -871,8 +882,8 @@ gen7_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx,
0,
0xff,
slice_batch);
- }
- }
+ }
+ }
}
slice_param++;
@@ -913,21 +924,16 @@ gen7_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx,
*/
static dri_bo *
gen7_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
{
- struct i965_driver_data *i965 = i965_driver_data(ctx);
+ struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
struct intel_batchbuffer *batch;
- VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
VAEncSliceParameterBufferMPEG2 *next_slice_group_param = NULL;
dri_bo *batch_bo;
int i;
- int buffer_size;
- int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
- int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
- buffer_size = width_in_mbs * height_in_mbs * 64;
- batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, buffer_size);
+ batch = mfc_context->aux_batchbuffer;
batch_bo = batch->buffer;
for (i = 0; i < encode_state->num_slice_params_ext; i++) {
@@ -948,14 +954,15 @@ gen7_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx,
dri_bo_reference(batch_bo);
intel_batchbuffer_free(batch);
+ mfc_context->aux_batchbuffer = NULL;
return batch_bo;
}
static void
gen7_mfc_mpeg2_pipeline_picture_programing(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
{
struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
@@ -971,8 +978,8 @@ gen7_mfc_mpeg2_pipeline_picture_programing(VADriverContextP ctx,
static void
gen7_mfc_mpeg2_pipeline_programing(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
{
struct intel_batchbuffer *batch = encoder_context->base.batch;
dri_bo *slice_batch_bo;
@@ -1002,8 +1009,8 @@ gen7_mfc_mpeg2_pipeline_programing(VADriverContextP ctx,
static VAStatus
gen7_mfc_mpeg2_prepare(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
{
struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
struct object_surface *obj_surface;
@@ -1015,7 +1022,7 @@ gen7_mfc_mpeg2_prepare(VADriverContextP ctx,
/* reconstructed surface */
obj_surface = encode_state->reconstructed_object;
- i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420);
+ i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
mfc_context->pre_deblocking_output.bo = obj_surface->bo;
dri_bo_reference(mfc_context->pre_deblocking_output.bo);
mfc_context->surface_state.width = obj_surface->orig_width;
@@ -1069,7 +1076,7 @@ gen7_mfc_mpeg2_prepare(VADriverContextP ctx,
dri_bo_map(bo, 1);
coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual;
coded_buffer_segment->mapped = 0;
- coded_buffer_segment->codec = CODED_MPEG2;
+ coded_buffer_segment->codec = encoder_context->codec;
dri_bo_unmap(bo);
return vaStatus;
@@ -1077,8 +1084,8 @@ gen7_mfc_mpeg2_prepare(VADriverContextP ctx,
static VAStatus
gen7_mfc_mpeg2_encode_picture(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context)
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
{
gen6_mfc_init(ctx, encode_state, encoder_context);
gen7_mfc_mpeg2_prepare(ctx, encode_state, encoder_context);
@@ -1098,7 +1105,7 @@ gen7_mfc_pipeline(VADriverContextP ctx,
VAStatus vaStatus;
switch (profile) {
- case VAProfileH264Baseline:
+ case VAProfileH264ConstrainedBaseline:
case VAProfileH264Main:
case VAProfileH264High:
vaStatus = gen6_mfc_avc_encode_picture(ctx, encode_state, encoder_context);
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