diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2011-05-17 17:00:22 +0800 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2011-05-25 13:00:10 +0800 |
commit | d934d2bda1dd6c9fc570be7f35171c5691a2d700 (patch) | |
tree | d0b68000613968fa7bedaa283ba4d560f51bcda9 /i965_drv_video | |
parent | 88931373a169a30f73837fde2739fdf1042f4820 (diff) | |
download | libva-d934d2bda1dd6c9fc570be7f35171c5691a2d700.tar.gz |
i965_drv_video: Ivybridge PCI IDs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Diffstat (limited to 'i965_drv_video')
-rw-r--r-- | i965_drv_video/i965_defines.h | 3 | ||||
-rw-r--r-- | i965_drv_video/i965_drv_video.c | 30 | ||||
-rw-r--r-- | i965_drv_video/i965_post_processing.c | 9 | ||||
-rw-r--r-- | i965_drv_video/i965_render.c | 12 | ||||
-rw-r--r-- | i965_drv_video/intel_batchbuffer.c | 3 | ||||
-rw-r--r-- | i965_drv_video/intel_driver.h | 11 |
6 files changed, 49 insertions, 19 deletions
diff --git a/i965_drv_video/i965_defines.h b/i965_drv_video/i965_defines.h index 66c3133..ea98441 100644 --- a/i965_drv_video/i965_defines.h +++ b/i965_drv_video/i965_defines.h @@ -546,7 +546,8 @@ #define MFX_SURFACE_PLANAR_420_8 4 #define MFX_SURFACE_MONOCHROME 12 -#define URB_SIZE(intel) (IS_GEN6(intel->device_id) ? 1024 : \ +#define URB_SIZE(intel) (IS_GEN7(intel->device_id) ? 4096 : \ + IS_GEN6(intel->device_id) ? 1024 : \ IS_IRONLAKE(intel->device_id) ? 1024 : \ IS_G4X(intel->device_id) ? 384 : 256) diff --git a/i965_drv_video/i965_drv_video.c b/i965_drv_video/i965_drv_video.c index 1a5e323..167375b 100644 --- a/i965_drv_video/i965_drv_video.c +++ b/i965_drv_video/i965_drv_video.c @@ -47,20 +47,27 @@ #define IMAGE_ID_OFFSET 0x0a000000 #define SUBPIC_ID_OFFSET 0x10000000 -#define HAS_MPEG2(ctx) (IS_G4X((ctx)->intel.device_id) || \ - IS_IRONLAKE((ctx)->intel.device_id) || \ - (IS_GEN6((ctx)->intel.device_id) && (ctx)->intel.has_bsd)) - -#define HAS_H264(ctx) ((IS_GEN6((ctx)->intel.device_id) || \ +#define HAS_MPEG2(ctx) (IS_G4X((ctx)->intel.device_id) || \ + IS_IRONLAKE((ctx)->intel.device_id) || \ + ((IS_GEN6((ctx)->intel.device_id) || \ + IS_GEN7((ctx)->intel.device_id)) && \ + (ctx)->intel.has_bsd)) + +#define HAS_H264(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id) || \ IS_IRONLAKE((ctx)->intel.device_id)) && \ (ctx)->intel.has_bsd) -#define HAS_VC1(ctx) (IS_GEN6((ctx)->intel.device_id) && (ctx)->intel.has_bsd) +#define HAS_VC1(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id)) && \ + (ctx)->intel.has_bsd) -#define HAS_TILED_SURFACE(ctx) (IS_GEN6((ctx)->intel.device_id) && \ +#define HAS_TILED_SURFACE(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id)) && \ (ctx)->render_state.interleaved_uv) -#define HAS_ENCODER(ctx) (IS_GEN6((ctx)->intel.device_id) && \ +#define HAS_ENCODER(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id)) && \ (ctx)->intel.has_bsd) enum { @@ -465,7 +472,8 @@ i965_CreateSurfaces(VADriverContextP ctx, obj_surface->orig_width = width; obj_surface->orig_height = height; - if (IS_GEN6(i965->intel.device_id)) { + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) { obj_surface->width = ALIGN(obj_surface->orig_width, 128); obj_surface->height = ALIGN(obj_surface->orig_height, 32); } else { @@ -826,7 +834,7 @@ i965_CreateContext(VADriverContextP ctx, render_state->interleaved_uv = 1; break; default: - render_state->interleaved_uv = !!IS_GEN6(i965->intel.device_id); + render_state->interleaved_uv = !!(IS_GEN6(i965->intel.device_id) || IS_GEN7(i965->intel.device_id)); break; } @@ -1640,6 +1648,8 @@ i965_Init(VADriverContextP ctx) i965->codec_info = &ironlake_hw_codec_info; else if (IS_GEN6(i965->intel.device_id)) i965->codec_info = &gen6_hw_codec_info; + else if (IS_GEN7(i965->intel.device_id)) + i965->codec_info = &gen6_hw_codec_info; else return VA_STATUS_ERROR_UNKNOWN; diff --git a/i965_drv_video/i965_post_processing.c b/i965_drv_video/i965_post_processing.c index f32bafd..23ca083 100644 --- a/i965_drv_video/i965_post_processing.c +++ b/i965_drv_video/i965_post_processing.c @@ -42,7 +42,8 @@ #include "i965_render.h" #define HAS_PP(ctx) (IS_IRONLAKE((ctx)->intel.device_id) || \ - IS_GEN6((ctx)->intel.device_id)) + IS_GEN6((ctx)->intel.device_id) || \ + IS_GEN7((ctx)->intel.device_id)) static const uint32_t pp_null_gen5[][4] = { #include "shaders/post_processing/null.g4b.gen5" @@ -2242,7 +2243,8 @@ i965_post_processing_internal(VADriverContextP ctx, { struct i965_driver_data *i965 = i965_driver_data(ctx); - if (IS_GEN6(i965->intel.device_id)) + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) gen6_post_processing(ctx, surface, input, srcx, srcy, srcw, srch, destx, desty, destw, desth, @@ -2376,7 +2378,8 @@ i965_post_processing_init(VADriverContextP ctx) assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen5)); assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen6)); - if (IS_GEN6(i965->intel.device_id)) + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) memcpy(pp_context->pp_modules, pp_modules_gen6, sizeof(pp_context->pp_modules)); else if (IS_IRONLAKE(i965->intel.device_id)) memcpy(pp_context->pp_modules, pp_modules_gen5, sizeof(pp_context->pp_modules)); diff --git a/i965_drv_video/i965_render.c b/i965_drv_video/i965_render.c index aa59fb9..5d2c1bf 100644 --- a/i965_drv_video/i965_render.c +++ b/i965_drv_video/i965_render.c @@ -1299,7 +1299,8 @@ i965_clear_dest_region(VADriverContextP ctx) br13 |= pitch; - if (IS_GEN6(i965->intel.device_id)) { + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) { intel_batchbuffer_start_atomic_blt(batch, 24); BEGIN_BLT_BATCH(batch, 6); } else { @@ -2115,7 +2116,8 @@ intel_render_put_surface(VADriverContextP ctx, destx, desty, destw, desth, flag); - if (IS_GEN6(i965->intel.device_id)) + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) gen6_render_put_surface(ctx, surface, srcx, srcy, srcw, srch, destx, desty, destw, desth, @@ -2141,7 +2143,8 @@ intel_render_put_subpicture(VADriverContextP ctx, { struct i965_driver_data *i965 = i965_driver_data(ctx); - if (IS_GEN6(i965->intel.device_id)) + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) gen6_render_put_subpicture(ctx, surface, srcx, srcy, srcw, srch, destx, desty, destw, desth); @@ -2164,7 +2167,8 @@ i965_render_init(VADriverContextP ctx) assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen6) / sizeof(render_kernels_gen6[0]))); - if (IS_GEN6(i965->intel.device_id)) + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) memcpy(render_state->render_kernels, render_kernels_gen6, sizeof(render_state->render_kernels)); else if (IS_IRONLAKE(i965->intel.device_id)) memcpy(render_state->render_kernels, render_kernels_gen5, sizeof(render_state->render_kernels)); diff --git a/i965_drv_video/intel_batchbuffer.c b/i965_drv_video/intel_batchbuffer.c index 30d782a..f52bde4 100644 --- a/i965_drv_video/intel_batchbuffer.c +++ b/i965_drv_video/intel_batchbuffer.c @@ -161,7 +161,8 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) { struct intel_driver_data *intel = batch->intel; - if (IS_GEN6(intel->device_id)) { + if (IS_GEN6(intel->device_id) || + IS_GEN7(intel->device_id)) { if (batch->flag == I915_EXEC_RENDER) { BEGIN_BATCH(batch, 4); OUT_BATCH(batch, CMD_PIPE_CONTROL | 0x2); diff --git a/i965_drv_video/intel_driver.h b/i965_drv_video/intel_driver.h index a1c97c4..a031935 100644 --- a/i965_drv_video/intel_driver.h +++ b/i965_drv_video/intel_driver.h @@ -151,6 +151,11 @@ struct intel_region #define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A /* Server */ #endif +#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* Desktop */ +#define PCI_CHIP_IVYBRIDGE_GT2 0x0162 +#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* Mobile */ +#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166 +#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */ #define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ devid == PCI_CHIP_Q45_G || \ @@ -171,4 +176,10 @@ struct intel_region devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ devid == PCI_CHIP_SANDYBRIDGE_S_GT) +#define IS_GEN7(devid) (devid == PCI_CHIP_IVYBRIDGE_GT1 || \ + devid == PCI_CHIP_IVYBRIDGE_GT2 || \ + devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \ + devid == PCI_CHIP_IVYBRIDGE_M_GT2 || \ + devid == PCI_CHIP_IVYBRIDGE_S_GT1) + #endif /* _INTEL_DRIVER_H_ */ |