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authorMichal Privoznik <mprivozn@redhat.com>2023-05-15 13:55:31 +0200
committerMichal Privoznik <mprivozn@redhat.com>2023-05-16 17:42:58 +0200
commit720e8f13ff71377580cd37b118cee8a1f982d1d8 (patch)
treeb8c5af95442040ae1d77facc47612a2b75fd27fb /docs/formatdomain.rst
parent37e41b7f160f7ca05ec290ef9c1def5088c9cbaa (diff)
downloadlibvirt-720e8f13ff71377580cd37b118cee8a1f982d1d8.tar.gz
conf: Introduce MTE domain feature
The Memory Tagging Extensions are hardware acceleration present in some ARM processors that allow memory error detection [1]. Introduce a domain XML knob that turns them on or off. 1: https://www.arm.com/blogs/blueprint/memory-safety-arm-memory-tagging-extension Signed-off-by: Michal Privoznik <mprivozn@redhat.com> Reviewed-by: Martin Kletzander <mkletzan@redhat.com>
Diffstat (limited to 'docs/formatdomain.rst')
-rw-r--r--docs/formatdomain.rst7
1 files changed, 7 insertions, 0 deletions
diff --git a/docs/formatdomain.rst b/docs/formatdomain.rst
index 99383e725c..1f52f58d37 100644
--- a/docs/formatdomain.rst
+++ b/docs/formatdomain.rst
@@ -2000,6 +2000,7 @@ Hypervisors may allow certain CPU / machine features to be toggled on/off.
<tcg>
<tb-cache unit='MiB'>128</tb-cache>
</tcg>
+ <mte state='on'/>
</features>
...
@@ -2230,6 +2231,12 @@ are:
tb-cache The size of translation block cache size an integer (a multiple of MiB) :since:`8.0.0`
=========== ============================================== =================================================== ==============
+``mte``
+ Configure Memory Tagging Extensions for ARM guests. Possible values for the
+ ``state`` attribute are ``on`` and ``off``. If the attribute is not
+ defined, the hypervisor default will be used. :since:`Since 9.4.0` (QEMU/KVM
+ only)
+
Time keeping
------------