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authorJames Zern <jzern@google.com>2023-05-05 19:15:29 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2023-05-05 19:15:29 +0000
commit662af5971681927d3ec21fd0e009ffd119c0d664 (patch)
tree8ed0e0d496526cd7dfc639c3370a863053c9540b
parente2f217c075707db42ff61b790f7adc63c59f7449 (diff)
parentc85b7331a5960bbb4074658641482bb40c902354 (diff)
downloadlibvpx-662af5971681927d3ec21fd0e009ffd119c0d664.tar.gz
Merge "macros_msa.h: clear -Wshadow warnings" into main
-rw-r--r--vpx_dsp/mips/macros_msa.h56
1 files changed, 28 insertions, 28 deletions
diff --git a/vpx_dsp/mips/macros_msa.h b/vpx_dsp/mips/macros_msa.h
index d54ce5368..53462b59f 100644
--- a/vpx_dsp/mips/macros_msa.h
+++ b/vpx_dsp/mips/macros_msa.h
@@ -774,16 +774,16 @@
Details : 4 signed word elements of 'in' vector are added together and
the resulting integer sum is returned
*/
-#define HADD_SW_S32(in) \
- ({ \
- v2i64 res0_m, res1_m; \
- int32_t sum_m; \
- \
- res0_m = __msa_hadd_s_d((v4i32)in, (v4i32)in); \
- res1_m = __msa_splati_d(res0_m, 1); \
- res0_m = res0_m + res1_m; \
- sum_m = __msa_copy_s_w((v4i32)res0_m, 0); \
- sum_m; \
+#define HADD_SW_S32(in) \
+ ({ \
+ v2i64 hadd_sw_s32_res0_m, hadd_sw_s32_res1_m; \
+ int32_t hadd_sw_s32_sum_m; \
+ \
+ hadd_sw_s32_res0_m = __msa_hadd_s_d((v4i32)in, (v4i32)in); \
+ hadd_sw_s32_res1_m = __msa_splati_d(hadd_sw_s32_res0_m, 1); \
+ hadd_sw_s32_res0_m = hadd_sw_s32_res0_m + hadd_sw_s32_res1_m; \
+ hadd_sw_s32_sum_m = __msa_copy_s_w((v4i32)hadd_sw_s32_res0_m, 0); \
+ hadd_sw_s32_sum_m; \
})
/* Description : Horizontal addition of 4 unsigned word elements
@@ -793,16 +793,16 @@
Details : 4 unsigned word elements of 'in' vector are added together and
the resulting integer sum is returned
*/
-#define HADD_UW_U32(in) \
- ({ \
- v2u64 res0_m, res1_m; \
- uint32_t sum_m; \
- \
- res0_m = __msa_hadd_u_d((v4u32)in, (v4u32)in); \
- res1_m = (v2u64)__msa_splati_d((v2i64)res0_m, 1); \
- res0_m += res1_m; \
- sum_m = __msa_copy_u_w((v4i32)res0_m, 0); \
- sum_m; \
+#define HADD_UW_U32(in) \
+ ({ \
+ v2u64 hadd_uw_u32_res0_m, hadd_uw_u32_res1_m; \
+ uint32_t hadd_uw_u32_sum_m; \
+ \
+ hadd_uw_u32_res0_m = __msa_hadd_u_d((v4u32)in, (v4u32)in); \
+ hadd_uw_u32_res1_m = (v2u64)__msa_splati_d((v2i64)hadd_uw_u32_res0_m, 1); \
+ hadd_uw_u32_res0_m += hadd_uw_u32_res1_m; \
+ hadd_uw_u32_sum_m = __msa_copy_u_w((v4i32)hadd_uw_u32_res0_m, 0); \
+ hadd_uw_u32_sum_m; \
})
/* Description : Horizontal addition of 8 unsigned halfword elements
@@ -812,14 +812,14 @@
Details : 8 unsigned halfword elements of 'in' vector are added
together and the resulting integer sum is returned
*/
-#define HADD_UH_U32(in) \
- ({ \
- v4u32 res_m; \
- uint32_t sum_m; \
- \
- res_m = __msa_hadd_u_w((v8u16)in, (v8u16)in); \
- sum_m = HADD_UW_U32(res_m); \
- sum_m; \
+#define HADD_UH_U32(in) \
+ ({ \
+ v4u32 hadd_uh_u32_res_m; \
+ uint32_t hadd_uh_u32_sum_m; \
+ \
+ hadd_uh_u32_res_m = __msa_hadd_u_w((v8u16)in, (v8u16)in); \
+ hadd_uh_u32_sum_m = HADD_UW_U32(hadd_uh_u32_res_m); \
+ hadd_uh_u32_sum_m; \
})
/* Description : Horizontal addition of unsigned byte vector elements