diff options
author | Sébastien Szymanski <sebastien.szymanski@armadeus.com> | 2019-10-22 15:16:51 +0200 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2019-10-28 14:48:43 +0800 |
commit | b22c2ac4c0ed16a3b80e81b00c87345692c19f89 (patch) | |
tree | 428f7e8b0ed5f0706beca03ef9e13edc18f37a00 /arch/arm/boot/dts/imx6qdl-apf6.dtsi | |
parent | 827f16f7e91adf0a91d7ade365361577dd35dd98 (diff) | |
download | linux-next-b22c2ac4c0ed16a3b80e81b00c87345692c19f89.tar.gz |
ARM: dts: imx6qdl-apf6: fix WiFi
These changes make the WiFi on the APF6 board work again.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-apf6.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-apf6.dtsi | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-apf6.dtsi b/arch/arm/boot/dts/imx6qdl-apf6.dtsi index d0205d5b3baa..b78ed7974ea9 100644 --- a/arch/arm/boot/dts/imx6qdl-apf6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apf6.dtsi @@ -5,6 +5,24 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> +/ { + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + vin-supply = <®_3p3v>; + }; + + usdhc1_pwrseq: usdhc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <15>; + power-off-delay-us = <70>; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; @@ -40,6 +58,12 @@ &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + mmc-pwrseq = <&usdhc1_pwrseq>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + cap-power-off-card; + keep-power-in-suspend; non-removable; status = "okay"; @@ -106,8 +130,8 @@ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 - MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 /* WL_EN */ - MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* WL_IRQ */ + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x130b0 /* WL_EN */ + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x130b0 /* WL_IRQ */ >; }; |