diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2022-05-13 12:26:13 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-06-11 16:50:26 +0800 |
| commit | c77c5b25c1353d5db4a7d2213fe12e54ab3a05dd (patch) | |
| tree | fb78f31651918fd01295c39b5873a0733c4602ea /arch/arm/boot/dts/imx6qdl-colibri.dtsi | |
| parent | f2906aa863381afb0015a9eb7fefad885d4e5a56 (diff) | |
| download | linux-next-c77c5b25c1353d5db4a7d2213fe12e54ab3a05dd.tar.gz | |
ARM: dts: imx6qdl-colibri: Mux mclk for sgtl5000 with the codec node
Move the pin muxing for MCLK used by the codec to the codec node
instead of placing it inside the audmux pinctrl group.
While no negative effects have been observed this should make sure that
MCLK is provided when the codec driver is probed.
Follows commit fa51e1dc4b91 ("ARM: dts: imx6qdl-apalis: Fix sgtl5000
detection issue")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-colibri.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-colibri.dtsi | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index c383e0e4110c..f3965884b797 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -520,6 +520,8 @@ compatible = "fsl,sgtl5000"; clocks = <&clks IMX6QDL_CLK_CKO>; lrclk-strength = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgtl5000>; reg = <0x0a>; #sound-dai-cells = <0>; VDDA-supply = <®_module_3v3_audio>; @@ -739,8 +741,6 @@ pinctrl_audmux: audmuxgrp { fsl,pins = < - /* SGTL5000 sys_mclk */ - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 @@ -991,6 +991,13 @@ >; }; + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins = < + /* SGTL5000 sys_mclk */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 + >; + }; + pinctrl_spdif: spdifgrp { fsl,pins = < MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 |