summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2018-04-27 20:54:04 +0200
committerSudeep Holla <sudeep.holla@arm.com>2018-05-09 17:46:38 +0100
commitbd7aff03406dbce495634e8b5d27e9b63f951720 (patch)
tree5abc0f591bf770e4ebc3eae2b4fbf93709dc0290 /arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
parent60cc43fc888428bb2f18f08997432d426a243338 (diff)
downloadlinux-next-bd7aff03406dbce495634e8b5d27e9b63f951720.tar.gz
ARM: dts: vexpress: Restructure motherboard includes
It is a bit unorthodox to just include a file in the middle of a another DTS file, it breaks the pattern from other device trees and also makes it really hard to reference things across the files with phandles. Restructure the include for the Versatile Express motherboards to happen at the top of the file, reference the target nodes directly, and indent the motherboard .dtsi files to reflect their actual depth in the hierarchy. This is a purely syntactic change that result in the same DTB files from the DTS/DTSI files. Cc: Robin Murphy <robin.murphy@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts')
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index a4c7713edfcd..65a874ea66be 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -9,6 +9,7 @@
*/
/dts-v1/;
+#include "vexpress-v2m-rs1.dtsi"
/ {
model = "V2P-CA15_CA7";
@@ -584,7 +585,7 @@
};
};
- smb@8000000 {
+ smb: smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
@@ -641,8 +642,6 @@
<0 0 40 &gic 0 40 4>,
<0 0 41 &gic 0 41 4>,
<0 0 42 &gic 0 42 4>;
-
- /include/ "vexpress-v2m-rs1.dtsi"
};
site2: hsb@40000000 {