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| author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2023-05-05 08:01:53 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2023-05-16 17:10:02 +0200 |
| commit | 559b33d2a8c546c06a4e398da064e4a787ea4aab (patch) | |
| tree | 5f01c4029568884bca1c85263fc0fcc3cbc0301f /arch/arm/boot/dts | |
| parent | 2f18e152217d9d784e3ca8270547917cfc7d7440 (diff) | |
| download | linux-next-559b33d2a8c546c06a4e398da064e4a787ea4aab.tar.gz | |
ARM: dts: stm32: Add pinmux for USART1 pins on stm32mp15
Add a mux option for the USART1 pins.
This is used on the Phycore STM32MP1.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index a1a994c9a48e..527c76c8be58 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -2273,6 +2273,33 @@ }; }; + usart1_pins_a: usart1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */ + bias-disable; + }; + }; + + usart1_idle_pins_a: usart1-idle-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ + <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */ + }; + }; + + usart1_sleep_pins_a: usart1-sleep-0 { + pins { + pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */ + <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS_NSS */ + }; + }; + usart2_pins_a: usart2-0 { pins1 { pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */ @@ -2612,4 +2639,34 @@ bias-disable; }; }; + + usart1_pins_b: usart1-1 { + pins1 { + pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */ + bias-disable; + }; + }; + + usart1_idle_pins_b: usart1-idle-1 { + pins1 { + pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */ + bias-disable; + }; + }; + + usart1_sleep_pins_b: usart1-sleep-1 { + pins { + pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */ + <STM32_PINMUX('Z', 6, ANALOG)>; /* USART1_RX */ + }; + }; }; |