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author | Greg Ungerer <gerg@uclinux.org> | 2010-11-09 15:31:08 +1000 |
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committer | Greg Ungerer <gerg@uclinux.org> | 2011-01-05 15:19:20 +1000 |
commit | 0ef6c9b8f7bf62ea05be5b26ee14b18a116b0c2a (patch) | |
tree | 01ffb12226fef2f4de5f3408e21fe64e19b5a522 /arch/m68k/include/asm/m54xxacr.h | |
parent | d475e3e4739ce465df740b51decbbea3b1b51823 (diff) | |
download | linux-next-0ef6c9b8f7bf62ea05be5b26ee14b18a116b0c2a.tar.gz |
m68knommu: support version 2 ColdFire split cache
The newer version 2 ColdFire CPU cores support a configurable cache
arrangement. The cache memory can be used as all instruction cache, all
data cache, or split in half for both instruction and data caching.
Support this setup via a Kconfig time menu that allows a kernel builder
to choose the arrangement they want to use.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m54xxacr.h')
0 files changed, 0 insertions, 0 deletions