summaryrefslogtreecommitdiff
path: root/arch/m68k/platform
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-10 07:22:35 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-10 07:22:35 -0700
commit977b58e1dd6fc2a751fb427798bfb8256476c93e (patch)
treeee71723ccffda6d183652266134f623d9541d76f /arch/m68k/platform
parentf5b8fcb48b9eb1a02f6a3a679da913f6c467527c (diff)
parent2842e5b00e99b30404f9af1c1b367c8e467b5c6c (diff)
downloadlinux-next-977b58e1dd6fc2a751fb427798bfb8256476c93e.tar.gz
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu updates from Greg Ungerer: "The bulk of the changes are generalizing the ColdFire v3 core support and adding in 537x CPU support. Also a couple of other bug fixes, one to fix a reintroduction of a past bug in the romfs filesystem nommu support." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68knommu: enable Timer on coldfire 532x m68knommu: fix ColdFire 5373/5329 QSPI base address m68knommu: add support for configuring a Freescale M5373EVB board m68knommu: add support for the ColdFire 537x family of CPUs m68knommu: make ColdFire M532x platform support more v3 generic m68knommu: create and use a common M53xx ColdFire class of CPUs m68k: remove unused asm/dbg.h m68k: Set ColdFire ACR1 cache mode depending on kernel configuration romfs: fix nommu map length to keep inside filesystem m68k: clean up unused "config ROMVECSIZE"
Diffstat (limited to 'arch/m68k/platform')
-rw-r--r--arch/m68k/platform/coldfire/Makefile2
-rw-r--r--arch/m68k/platform/coldfire/m53xx.c (renamed from arch/m68k/platform/coldfire/m532x.c)23
-rw-r--r--arch/m68k/platform/coldfire/timers.c2
3 files changed, 13 insertions, 14 deletions
diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
index 02591a109f8c..68f0fac60099 100644
--- a/arch/m68k/platform/coldfire/Makefile
+++ b/arch/m68k/platform/coldfire/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
-obj-$(CONFIG_M532x) += m532x.o timers.o intc-simr.o reset.o
+obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
obj-$(CONFIG_M54xx) += m54xx.o sltimers.o intc-2.o
obj-$(CONFIG_M5441x) += m5441x.o pit.o intc-simr.o reset.o
diff --git a/arch/m68k/platform/coldfire/m532x.c b/arch/m68k/platform/coldfire/m53xx.c
index 7951d1d43357..5286f98fbed0 100644
--- a/arch/m68k/platform/coldfire/m532x.c
+++ b/arch/m68k/platform/coldfire/m53xx.c
@@ -1,7 +1,7 @@
/***************************************************************************/
/*
- * linux/arch/m68knommu/platform/532x/config.c
+ * m53xx.c -- platform support for ColdFire 53xx based boards
*
* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
* Copyright (C) 2000, Lineo (www.lineo.com)
@@ -118,7 +118,8 @@ static struct clk * const enable_clks[] __initconst = {
&__clk_0_24, /* mcfuart.0 */
&__clk_0_25, /* mcfuart.1 */
&__clk_0_26, /* mcfuart.2 */
-
+ &__clk_0_28, /* mcftmr.0 */
+ &__clk_0_29, /* mcftmr.1 */
&__clk_0_32, /* mcfpit.0 */
&__clk_0_33, /* mcfpit.1 */
&__clk_0_37, /* mcfeport.0 */
@@ -134,8 +135,6 @@ static struct clk * const disable_clks[] __initconst = {
&__clk_0_17, /* edma */
&__clk_0_22, /* mcfi2c.0 */
&__clk_0_23, /* mcfqspi.0 */
- &__clk_0_28, /* mcftmr.0 */
- &__clk_0_29, /* mcftmr.1 */
&__clk_0_30, /* mcftmr.2 */
&__clk_0_31, /* mcftmr.3 */
&__clk_0_34, /* mcfpit.2 */
@@ -153,7 +152,7 @@ static struct clk * const disable_clks[] __initconst = {
};
-static void __init m532x_clk_init(void)
+static void __init m53xx_clk_init(void)
{
unsigned i;
@@ -169,7 +168,7 @@ static void __init m532x_clk_init(void)
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
-static void __init m532x_qspi_init(void)
+static void __init m53xx_qspi_init(void)
{
/* setup QSPS pins for QSPI with gpio CS control */
writew(0x01f0, MCFGPIO_PAR_QSPI);
@@ -179,7 +178,7 @@ static void __init m532x_qspi_init(void)
/***************************************************************************/
-static void __init m532x_uarts_init(void)
+static void __init m53xx_uarts_init(void)
{
/* UART GPIO initialization */
writew(readw(MCFGPIO_PAR_UART) | 0x0FFF, MCFGPIO_PAR_UART);
@@ -187,7 +186,7 @@ static void __init m532x_uarts_init(void)
/***************************************************************************/
-static void __init m532x_fec_init(void)
+static void __init m53xx_fec_init(void)
{
u8 v;
@@ -217,11 +216,11 @@ void __init config_BSP(char *commandp, int size)
}
#endif
mach_sched_init = hw_timer_init;
- m532x_clk_init();
- m532x_uarts_init();
- m532x_fec_init();
+ m53xx_clk_init();
+ m53xx_uarts_init();
+ m53xx_fec_init();
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
- m532x_qspi_init();
+ m53xx_qspi_init();
#endif
#ifdef CONFIG_BDM_DISABLE
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
index 51f6d2af807f..d06068e45764 100644
--- a/arch/m68k/platform/coldfire/timers.c
+++ b/arch/m68k/platform/coldfire/timers.c
@@ -36,7 +36,7 @@
*/
void coldfire_profile_init(void);
-#if defined(CONFIG_M532x) || defined(CONFIG_M5441x)
+#if defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
#define __raw_readtrr __raw_readl
#define __raw_writetrr __raw_writel
#else