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authorNicholas Piggin <npiggin@gmail.com>2023-04-08 12:17:51 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2023-04-20 12:59:21 +1000
commit7e3a68be42e10f5fa5890e97afc0afd992355bc3 (patch)
tree98c6a0b7b0f14f3ecff9df3e3ff2397d06fee033 /arch/powerpc/include/asm
parent4e991e3c16a350d1eeffc100ce3fb25292596d03 (diff)
downloadlinux-next-7e3a68be42e10f5fa5890e97afc0afd992355bc3.tar.gz
powerpc/64: vmlinux support building with PCREL addresing
PC-Relative or PCREL addressing is an extension to the ELF ABI which uses Power ISA v3.1 PC-relative instructions to calculate addresses, rather than the traditional TOC scheme. Add an option to build vmlinux using pcrel addressing. Modules continue to use TOC addressing. - TOC address helpers and r2 are poisoned with -1 when running vmlinux. r2 could be used for something useful once things are ironed out. - Assembly must call C functions with @notoc annotation, or the linker complains aobut a missing nop after the call. This is done with the CFUNC macro introduced earlier. - Boot: with the exception of prom_init, the execution branches to the kernel virtual address early in boot, before any addresses are generated, which ensures 34-bit pcrel addressing does not miss the high PAGE_OFFSET bits. TOC relative addressing has a similar requirement. prom_init does not go to the virtual address and its addresses should not carry over to the post-prom kernel. - Ftrace trampolines are converted from TOC addressing to pcrel addressing, including module ftrace trampolines that currently use the kernel TOC to find ftrace target functions. - BPF function prologue and function calling generation are converted from TOC to pcrel. - copypage_64.S has an interesting problem, prefixed instructions have alignment restrictions so the linker can add padding, which makes the assembler treat the difference between two local labels as non-constant even if alignment is arranged so padding is not required. This may need toolchain help to solve nicely, for now move the prefix instruction out of the alternate patch section to work around it. This reduces kernel text size by about 6%. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230408021752.862660-6-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/paca.h2
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h8
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h19
-rw-r--r--arch/powerpc/include/asm/sections.h5
4 files changed, 34 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 0ab3511a47d7..da0377f46597 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -88,7 +88,9 @@ struct paca_struct {
u16 lock_token; /* Constant 0x8000, used in locks */
#endif
+#ifndef CONFIG_PPC_KERNEL_PCREL
u64 kernel_toc; /* Kernel TOC address */
+#endif
u64 kernelbase; /* Base address of kernel */
u64 kernel_msr; /* MSR while running in kernel */
void *emergency_sp; /* pointer to emergency stack */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 21e33e46f4b8..ca5a0da7df4e 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -120,11 +120,18 @@
* 16-bit immediate helper macros: HA() is for use with sign-extending instrs
* (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the
* top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
+ *
+ * XXX: should these mask out possible sign bits?
*/
#define IMM_H(i) ((uintptr_t)(i)>>16)
#define IMM_HA(i) (((uintptr_t)(i)>>16) + \
(((uintptr_t)(i) & 0x8000) >> 15))
+/*
+ * 18-bit immediate helper for prefix 18-bit upper immediate si0 field.
+ */
+#define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
+
/* opcode and xopcode for instructions */
#define OP_PREFIX 1
@@ -306,6 +313,7 @@
#define PPC_PREFIX_8LS 0x04000000
/* Prefixed instructions */
+#define PPC_INST_PADDI 0x38000000
#define PPC_INST_PLD 0xe4000000
#define PPC_INST_PSTD 0xf4000000
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index f08b7990a69d..4dfabf4ef966 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -183,7 +183,11 @@
/*
* Used to name C functions called from asm
*/
+#if defined(CONFIG_PPC_KERNEL_PCREL) && !defined(MODULE)
+#define CFUNC(name) name@notoc
+#else
#define CFUNC(name) name
+#endif
/*
* We use __powerpc64__ here because we want the compat VDSO to use the 32-bit
@@ -212,6 +216,9 @@
.globl name; \
name:
+#if defined(CONFIG_PPC_KERNEL_PCREL) && !defined(MODULE)
+#define _GLOBAL_TOC _GLOBAL
+#else
#define _GLOBAL_TOC(name) \
.align 2 ; \
.type name,@function; \
@@ -220,6 +227,7 @@ name: \
0: addis r2,r12,(.TOC.-0b)@ha; \
addi r2,r2,(.TOC.-0b)@l; \
.localentry name,.-name
+#endif
#define DOTSYM(a) a
@@ -351,8 +359,13 @@ n:
#ifdef __powerpc64__
+#ifdef CONFIG_PPC_KERNEL_PCREL
+#define __LOAD_PACA_TOC(reg) \
+ li reg,-1
+#else
#define __LOAD_PACA_TOC(reg) \
ld reg,PACATOC(r13)
+#endif
#define LOAD_PACA_TOC() \
__LOAD_PACA_TOC(r2)
@@ -366,9 +379,15 @@ n:
ori reg, reg, (expr)@l; \
rldimi reg, tmp, 32, 0
+#if defined(CONFIG_PPC_KERNEL_PCREL) && !defined(MODULE)
+#define LOAD_REG_ADDR(reg,name) \
+ pla reg,name@pcrel
+
+#else
#define LOAD_REG_ADDR(reg,name) \
addis reg,r2,name@toc@ha; \
addi reg,reg,name@toc@l
+#endif
#ifdef CONFIG_PPC_BOOK3E_64
/*
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index 9c00c9c0ca8f..4e1f548c8d37 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -46,10 +46,15 @@ extern char end_virt_trampolines[];
*/
static inline unsigned long kernel_toc_addr(void)
{
+#ifdef CONFIG_PPC_KERNEL_PCREL
+ BUILD_BUG();
+ return -1UL;
+#else
unsigned long toc_ptr;
asm volatile("mr %0, 2" : "=r" (toc_ptr));
return toc_ptr;
+#endif
}
static inline int overlaps_interrupt_vector_text(unsigned long start,