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authorStephen Boyd <sboyd@kernel.org>2018-12-11 09:57:48 -0800
committerStephen Boyd <sboyd@kernel.org>2018-12-11 09:57:48 -0800
commite1bd55e5a567a90c5b26238a46bbaf1c775e9661 (patch)
tree2d972370d4dbfdd86620f4bc93754f9ec4df6275 /drivers/clk/clk-fractional-divider.c
parentebafb63dc7759c4cc54065b5aa675080b5f453ce (diff)
downloadlinux-next-e1bd55e5a567a90c5b26238a46bbaf1c775e9661.tar.gz
clk: Tag basic clk types with SPDX
These are all GPL-2.0 files per the existing license text. Replace the boiler plate with the tag. Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-fractional-divider.c')
-rw-r--r--drivers/clk/clk-fractional-divider.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c
index fdf625fb10fa..830f1361ff79 100644
--- a/drivers/clk/clk-fractional-divider.c
+++ b/drivers/clk/clk-fractional-divider.c
@@ -1,10 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2014 Intel Corporation
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
* Adjustable fractional divider clock implementation.
* Output rate = (m / n) * parent_rate.
* Uses rational best approximation algorithm.