summaryrefslogtreecommitdiff
path: root/drivers/clk/renesas
diff options
context:
space:
mode:
authorBiju Das <biju.das.jz@bp.renesas.com>2021-11-20 18:04:38 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-11-26 14:06:16 +0100
commit33b22d9c3272003a525ba2d6b7b851f3d4f30574 (patch)
tree21229b27c57bbdd2e2cb7e1c39cd9c4dd4a331fc /drivers/clk/renesas
parent45177fc641f9de58180af158d1fac8defa99afca (diff)
downloadlinux-next-33b22d9c3272003a525ba2d6b7b851f3d4f30574.tar.gz
clk: renesas: r9a07g044: Add TSU clock and reset entry
Add TSU clock and reset entry to CPG driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211120180438.8351-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r--drivers/clk/renesas/r9a07g044-cpg.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index c0ca021136fa..a91ccad6329b 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -260,6 +260,8 @@ static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
0x5a8, 0),
DEF_MOD("adc_pclk", R9A07G044_ADC_PCLK, R9A07G044_CLK_P0,
0x5a8, 1),
+ DEF_MOD("tsu_pclk", R9A07G044_TSU_PCLK, R9A07G044_CLK_TSU,
+ 0x5ac, 0),
};
static struct rzg2l_reset r9a07g044_resets[] = {
@@ -308,6 +310,7 @@ static struct rzg2l_reset r9a07g044_resets[] = {
DEF_RST(R9A07G044_GPIO_SPARE_RESETN, 0x898, 2),
DEF_RST(R9A07G044_ADC_PRESETN, 0x8a8, 0),
DEF_RST(R9A07G044_ADC_ADRST_N, 0x8a8, 1),
+ DEF_RST(R9A07G044_TSU_PRESETN, 0x8ac, 0),
};
static const unsigned int r9a07g044_crit_mod_clks[] __initconst = {