diff options
author | Magnus Damm <damm@igel.co.jp> | 2009-04-29 14:50:37 +0000 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-04-30 12:57:30 +0900 |
commit | 3014f47460ecfb13d4169daae51f26a20bacfa17 (patch) | |
tree | 3c5c77d96a03f4c64437a984fa07ba857280f554 /drivers/clocksource | |
parent | e6be3a25861429166f945499c7ee616875bc3db9 (diff) | |
download | linux-next-3014f47460ecfb13d4169daae51f26a20bacfa17.tar.gz |
clocksource: sh_cmt 16-bit fixes
This patch contains various fixes for 16-bit cmt hardware.
With this applied periodic clockevents work fine on sh7203.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/sh_cmt.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index bf3e4c11fd37..4ff1508e5ab7 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -158,16 +158,18 @@ static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate) pr_err("sh_cmt: cannot enable clock \"%s\"\n", cfg->clk); return ret; } - *rate = clk_get_rate(p->clk) / 8; /* make sure channel is disabled */ sh_cmt_start_stop_ch(p, 0); /* configure channel, periodic mode and maximum timeout */ - if (p->width == 16) - sh_cmt_write(p, CMCSR, 0); - else + if (p->width == 16) { + *rate = clk_get_rate(p->clk) / 512; + sh_cmt_write(p, CMCSR, 0x43); + } else { + *rate = clk_get_rate(p->clk) / 8; sh_cmt_write(p, CMCSR, 0x01a4); + } sh_cmt_write(p, CMCOR, 0xffffffff); sh_cmt_write(p, CMCNT, 0); @@ -615,7 +617,7 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) if (resource_size(res) == 6) { p->width = 16; p->overflow_bit = 0x80; - p->clear_bits = ~0xc0; + p->clear_bits = ~0x80; } else { p->width = 32; p->overflow_bit = 0x8000; |