diff options
| author | Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2016-04-13 17:26:42 +0300 |
|---|---|---|
| committer | Mika Kuoppala <mika.kuoppala@intel.com> | 2016-04-14 12:27:37 +0300 |
| commit | 666fbcf5c21d8d8654b00b9c2e21a3caf070e9f8 (patch) | |
| tree | 93d59a44b71b595ca535460e491924a0b9b59d86 /drivers/gpu/drm/i915/i915_gem.c | |
| parent | 3cb26e26edd12b11b98bbe2b8c89c3a0da79e390 (diff) | |
| download | linux-next-666fbcf5c21d8d8654b00b9c2e21a3caf070e9f8.tar.gz | |
drm/i915: Don't program eLLC IDI hash mask for gen9+
For gen9 onwards, eDRAM is a true memory side cache. So
there is no need to program idi hash mask as it is for eLLC
only.
v2: INTEL_GEN (Chris), s/has/hash (Matthew)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b37ffea8b458..3e1222b57fee 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4892,7 +4892,7 @@ i915_gem_init_hw(struct drm_device *dev) /* Double layer security blanket, see i915_gem_init() */ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); - if (dev_priv->ellc_size) + if (dev_priv->ellc_size && INTEL_GEN(dev_priv) < 9) I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf)); if (IS_HASWELL(dev)) |