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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-11-23 18:06:17 +0200 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-11-26 18:55:39 +0200 |
commit | 013d37520af735fd55f78e33edf55cc6fb3858eb (patch) | |
tree | c3b76258ee806d6e0810d8275c68cdf2b889c4c0 /drivers/gpu/drm/i915/intel_fifo_underrun.c | |
parent | fbdedaeaa7e43f3cf57617b713926eade2535202 (diff) | |
download | linux-next-013d37520af735fd55f78e33edf55cc6fb3858eb.tar.gz |
drm/i915: Introduce bdw_{update,enable,disable}_pipe_irq()
Pull the BDW+ DE pipe interrupt mask frobbing into a central place,
like we have for other platforms.
v2: Fix the kerneldoc (Daniel)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1448294777-13722-4-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fifo_underrun.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_fifo_underrun.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c index 48bd079bdb06..bda526660e20 100644 --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c @@ -178,14 +178,10 @@ static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev, { struct drm_i915_private *dev_priv = dev->dev_private; - assert_spin_locked(&dev_priv->irq_lock); - if (enable) - dev_priv->de_irq_mask[pipe] &= ~GEN8_PIPE_FIFO_UNDERRUN; + bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_FIFO_UNDERRUN); else - dev_priv->de_irq_mask[pipe] |= GEN8_PIPE_FIFO_UNDERRUN; - I915_WRITE(GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]); - POSTING_READ(GEN8_DE_PIPE_IMR(pipe)); + bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_FIFO_UNDERRUN); } static void ibx_set_fifo_underrun_reporting(struct drm_device *dev, |