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| author | Eric Anholt <eric@anholt.net> | 2016-12-14 11:46:15 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2017-02-01 12:51:22 -0800 |
| commit | a86773d120d75569d151b95ac8e0df657d4bfe48 (patch) | |
| tree | a37be9add15be0c0b548513ed8e1cb392c86a4ea /drivers/gpu/drm/vc4/vc4_regs.h | |
| parent | d17a1bb9b801f7046af29c31b946a9619bfe382d (diff) | |
| download | linux-next-a86773d120d75569d151b95ac8e0df657d4bfe48.tar.gz | |
drm/vc4: Add support for feeding DSI encoders from the pixel valve.
We have to set a different pixel format, which tells the hardware to
use the pix_width field that's fed in sideband from the DSI encoder to
divide the "pixel" clock.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161214194621.16499-6-eric@anholt.net
Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_regs.h')
| -rw-r--r-- | drivers/gpu/drm/vc4/vc4_regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index b3b297fba709..385405a2df05 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -190,6 +190,8 @@ # define PV_VCONTROL_ODD_DELAY_SHIFT 6 # define PV_VCONTROL_ODD_FIRST BIT(5) # define PV_VCONTROL_INTERLACE BIT(4) +# define PV_VCONTROL_DSI BIT(3) +# define PV_VCONTROL_COMMAND BIT(2) # define PV_VCONTROL_CONTINUOUS BIT(1) # define PV_VCONTROL_VIDEN BIT(0) |