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author | Sergey Gorenko <sergeygo@nvidia.com> | 2021-05-10 13:23:33 +0300 |
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committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-05-20 11:41:07 -0300 |
commit | c906b86e9c44946fae505a5996b1f4c24a699fe6 (patch) | |
tree | 0a0afbd32764d68f94d98789d3747ca27747a1e5 /drivers/infiniband/hw/mlx5 | |
parent | 021c1f24f002e9312ad3516f65f148299f2eb4ee (diff) | |
download | linux-next-c906b86e9c44946fae505a5996b1f4c24a699fe6.tar.gz |
RDMA/mlx5: Add SQD2RTS bit to the alloc ucontext response
The new bit in the comp_mask is needed to mark that kernel supports
SQD2RTS transition for the modify QP command.
Link: https://lore.kernel.org/r/7ce705fedac1b2b8e3a2f4013e04244dc5946344.1620641808.git.leonro@nvidia.com
Reviewed-by: Evgenii Kochetov <evgeniik@nvidia.com>
Signed-off-by: Sergey Gorenko <sergeygo@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'drivers/infiniband/hw/mlx5')
-rw-r--r-- | drivers/infiniband/hw/mlx5/main.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c index 6d1dd09a4388..312aa731860d 100644 --- a/drivers/infiniband/hw/mlx5/main.c +++ b/drivers/infiniband/hw/mlx5/main.c @@ -1817,6 +1817,10 @@ static int set_ucontext_resp(struct ib_ucontext *uctx, resp->comp_mask |= MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_ECE; resp->num_dyn_bfregs = bfregi->num_dyn_bfregs; + + if (MLX5_CAP_GEN(dev->mdev, drain_sigerr)) + resp->comp_mask |= MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_SQD2RTS; + return 0; } |