diff options
| author | Dmitry Bezrukov <dbezrukov@marvell.com> | 2020-05-22 11:19:39 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-05-22 14:08:28 -0700 |
| commit | 0aa7bc3ee4652e0790f9b42c93c769b59b9f2308 (patch) | |
| tree | 6fd3a6c835dafa5fd70fdec670bbb4d6b003cd8d /drivers/net/ethernet/aquantia/atlantic/aq_hw.h | |
| parent | 593dd0fc202eed27de07c5df9ef24a3c00cf0c09 (diff) | |
| download | linux-next-0aa7bc3ee4652e0790f9b42c93c769b59b9f2308.tar.gz | |
net: atlantic: changes for multi-TC support
This patch contains the following changes:
* add cfg->is_ptp (used for PTP enable/disable switch, which
is described in more details below);
* add cfg->tc_mode (A1 supports 2 HW modes only);
* setup queue to TC mapping based on TC mode on A2;
* remove hw_tx_tc_mode_get / hw_rx_tc_mode_get hw_ops.
In the first generation of our hardware (A1), a whole traffic class is
consumed for PTP handling in FW (FW uses it to send the ptp data and to
send back timestamps).
The 'is_ptp' flag introduced in this patch will be used in to automatically
disable PTP when a conflicting configuration is detected, e.g. when
multiple TCs are enabled.
Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com>
Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/aquantia/atlantic/aq_hw.h')
| -rw-r--r-- | drivers/net/ethernet/aquantia/atlantic/aq_hw.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h index 703ef8d064a2..c3df9da6088c 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h +++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h @@ -18,6 +18,12 @@ #define AQ_HW_MAC_COUNTER_HZ 312500000ll #define AQ_HW_PHY_COUNTER_HZ 160000000ll +enum aq_tc_mode { + AQ_TC_MODE_INVALID = -1, + AQ_TC_MODE_8TCS, + AQ_TC_MODE_4TCS, +}; + #define AQ_RX_FIRST_LOC_FVLANID 0U #define AQ_RX_LAST_LOC_FVLANID 15U #define AQ_RX_FIRST_LOC_FETHERT 16U @@ -281,10 +287,6 @@ struct aq_hw_ops { int (*hw_set_offload)(struct aq_hw_s *self, struct aq_nic_cfg_s *aq_nic_cfg); - int (*hw_tx_tc_mode_get)(struct aq_hw_s *self, u32 *tc_mode); - - int (*hw_rx_tc_mode_get)(struct aq_hw_s *self, u32 *tc_mode); - int (*hw_ring_hwts_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring); |